[SOLVED] Op Amp with feedback Bias Problem

[anishsingh]

I have been trying to design an op amp of open loop gain of around 80dB which reduces to 40dB in negative feedback. I have been using non inverting config to provide feedback. Simulation of this circuit with resistances as feedback elements disturb completely the biasing of original op amp while adding a series capacitance degrades its frequency response.

Plz Help !:-(

 

[goldsmith]

Dear anishsingh
Hi
Confusing thread .
At first you told you want do it without any feedback . and at the other step you told you want do it with non inverting configuration to provide feed back !!!!!!!!!!!!!!!!
Can you tell me more about what you want to do ? and can you attach your circuit here ?
Best Things
Goldsmith

 

[LvW]

I have been trying to design an op amp of open loop gain of around 80dB which reduces to 40dB in negative feedback. I have been using non inverting config to provide feedback. Simulation of this circuit with resistances as feedback elements disturb completely the biasing of original op amp while adding a series capacitance degrades its frequency response.

Plz Help !:-(

A series capacitor in the feedback path is not allowed because you need dc feedback for stabilization of the operating point (bias point).

 

[anishsingh]

Oh, Sorry for the ambiguity !
I have been trying to design and simulate a single ended OTA of Closed Loop Gain(due to negative feedback) as around 40dB. I have successfully designed a folded cascode OTA of Open Loop gain of 95dB and trying to connect a resistive negative feedback so that closed loop gain 40dB. The problem is that the biasing of Op amp transistors is getting completely disturbed due to resistive network which is sucking up a lotta current. Using huge R values is doing no help either. Adding a series cap between o/p node and f/b network severely degrades the frequency response in terms of very low 3dB bandwidth. Giving a compete capacitive feedback is also not helping !
It would be gr8 if u guys could help me out !
Thanks!

---------- Post added at 14:46 ---------- Previous post was at 14:31 ----------

Actually I just wanted to know the way of providing negative feedback without disturbing the Q point of the ota itself

 

[checkmate]

The resistive feedback should not disturb the biasing of a properly designed opamp.
The problem probably lies elsewhere. At 40dB, you are looking at a 100x gain.
Are you sure your output is not saturated? Or is your output so large that the biasing of the output stage is off?
Some schematics might help.

 

[anishsingh]

I have been simulating in cadence 180 nm cmos technology with pmos input folded cascode topology. The op amp works fine in open loop ( no feedback) with all transistors in saturation with 95 dB gain. The problem with feedback is that the nmos transistors in the cascode branch of folded cascode topology slip away from saturation as they do not get the required bias drain current !

---------- Post added at 14:57 ---------- Previous post was at 14:56 ----------

I need to have all transistors in sat in my final design !

 

[checkmate]

Then this is exactly what I mentioned when the output biasing is off.
To be specific, your opamp cannot support the required output swing!
In other words, it's a design problem