Op amp topology selection using system simulations

[amic]

I am working on the architecture design for opamps tobe used in a chip tempareture detector. For this Op amp I need to have good PSRR...which is supported by Single stage OTAs but I also need to keep the output resistance low which would need two stage op amp with o/p buffer.

In such situations of trade offs, Do we have a tabulated comparision of different op amp topology to select the best one ( optimal) ?

 

[sunking]

Op amp topology selection

cascode+calss AB output

 

[philipwang]

Re: Op amp topology selection

Dear Amic,

As sunking mentioned, to achieve high PSRR and low output impedance cascode+class AB may be the best choice. Its output impedance can be down ~1kohm, if lower impedance is requirested parallel negative feedback topology may be proposed.

Bg,

 

[amic]

thanks philip and sunking. But can you give me any idea about how system simulations are done to find what specs of op amp would be needed. This is because the output of my opamp will go to A/D converter. Since I haven't selected the topology of that A/D converter, I don't know how much load its gonna offer to op amp.

 

[amic]

Re: Op amp topology selection

Dear Amic,

As sunking mentioned, to achieve high PSRR and low output impedance cascode+class AB may be the best choice. Its output impedance can be down ~1kohm, if lower impedance is requirested parallel negative feedback topology may be proposed.

Bg,

I am not familier with parallel negative feedback topology ? what is it exactly ? where can I read about it ?

 

[philipwang]

Re: Op amp topology selection

Dear Amic,

As to your question, there are three advices:
1. Since your amp is used in A/D, you should decide its load capacitance accoreding ite application condition, this work can be done through analyse its exact connection relate;
2. Other character of amp should be decided by system characters including ite resolution, speed and topology;
3. You can using matlab-simulink tool to run system simulation and verify the function of your design.

Bg,

Dear Amic,

As sunking mentioned, to achieve high PSRR and low output impedance cascode+class AB may be the best choice. Its output impedance can be down ~1kohm, if lower impedance is requirested parallel negative feedback topology may be proposed.

Bg,

I am not familier with parallel negative feedback topology ? what is it exactly ? where can I read about it ?

Added after 10 minutes:

Dear Amic,
Sorry for ignoring this question. You can refer to Philip E.Allen' book to find the parallel negative feedback topology:
CMOS analog circuit design. Chapter 7 section 1: buffer amplifier.
Enjoy it!

Bg,

Dear Amic,

As sunking mentioned, to achieve high PSRR and low output impedance cascode+class AB may be the best choice. Its output impedance can be down ~1kohm, if lower impedance is requirested parallel negative feedback topology may be proposed.

Bg,

I am not familier with parallel negative feedback topology ? what is it exactly ? where can I read about it ?

 

[xwcwc1234]

How to simualte the system with Matlab ? Is that means opamp or other MOSFET can be modeled by Matlab ? Can someone provide the matlab m-file for sharing ?