op-amp and loading effect...

[QT_GIRL]

Hi guys,
im designing a diff two stage opamp. (inverting opamp with Closed loop of R2/R1=-10K/1K)

I am not sure if i have to design a s ource follower in the last stage. For some reason my gain drops to zero only in the last stage where CL and output ports are applied. I am not sure why this is happenening. Is it due to the fact that i didn't design a source follower?

 

[maofeng]

For a 2-stage diff amp, you don't need to design the 2nd stage as a source follower. The drop of your gain is mainly due to DC-bias problem. Check your DC bias first. And I suggest you study carefully Razavi's book:

Design of Analog CMOS Integrated Circuits,

Sec. 10.5 : Compensation for two-stage OP Amp.

You can ge the book at :

**broken link removed**

 

[abcyin]

Hi,
it's due to the drive ability of your amplifer to the load port, that's to say, your amp's output resistance cannot drive the load impedance. during your design procedure, you should pay attention to the load situation, including cap and res.
If you want to drive a relatively low impedance, always designing a source follower as the last stage of your amplifier is good method to shield the load and the former amplifier, then the gain will not be pulled down by the load.

hope it helps!

 

[QT_GIRL]

thanks abcyin,
but could it be due to the fact that i haven't designed my CMFB yet? im not sure how that could affect in my results.

 

[abcyin]

Hi,
If you haven't designed the CMFB circuit, you should pay attention to the working state of all the transistors in your schematic, the purpose of designing CMFB is to keep the transistors in the right region. If the transistors are still in right region after you attached the load and also the amp's drive ability is enough, then the gain of it will not reduced.
So, CMFB to keep transistors in right region, and Drive ability to drive low impedance. that's it.

Hope it helps!