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Old time hobbyist needs pointing in right direction.....

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madhouse

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I need to re-design an existing circuit to seriously reduce chip count and implement some new functions. The existing design is all in standard 74HC series logic. I'm looking at the possibility of experimenting with CPLD or FPGA as a solution, but I'm limited by the fact I can only realistically work with DIP / PLCC packages and home brew boards.

I've tentatively looked at the Xilinx Webpack, basically because I can easily throw together a JTAG programmer, can source XC9500 parts relatively cheaply, and in suitable packaging.

BUT - and the big one - I can't find any decent tutorials on the software. I'd prefer to use schematic design, as it's probably easier for me to grasp initially, and I'll worry about programming languages later.

Also, I'm open to suggestions on alternative devices to use - there is no particular reason for my initial choice other than it "seems to fit the bill".

BTW, I need to produce a dual port 2MByte SRAM, (one port write only, one port read only with a 21 bit counter generating the read address, and an external SRAM obviously). The write-only port needs a minimum cycle time of 200ns, the 2M SRAM has an access time of 70nS and the read-only port can latch data as soon as. There will be an external clock source for the counter, and the ability to either pre-load the counter or add an offset would be an advantage, but not essential. SRAM data does not necessarily need to be passed via the device.
In conventional TTL logic it's relatively simple, but with a high chip count, and lots of associated nasties....

Any suggetions on routes to take, tutorials, practical devices etc would be really good!:D
 

I would recommend https://www.xess.com/.
That is a company from a professor from NC.
They have the hardware and the software to
start a design in FPGA or CPLD. The pragmatic
tutorial from them is very good IMHO. The software
is not something propietary it is just to communicate
with the board. You can use Xilinx own software
to create the firmware. The examples from
users are very good also. Take a look.
 

    madhouse

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You might want to take a look at the User Manual for the (somewhat old) Xilinx/Digilent Spartan-3 Starter Kit. It includes schematics, so you can see how a small FPGA is used on a relatively simple board with a static RAM chip.
**broken link removed**

A CPLD may be sufficient for your project, and it would probably be cheaper than an FPGA. I usually choose FPGAs because they are vastly more flexible.

Many FPGAs and CPLDs come in BGA packages that are trouble for hobby assembly. However, some are available in fine-pitch quad flat packs that are very easy to hand-solder in a few seconds, once you get the hang of it.

I know it's tempting to continue using schematic capture with FPGA and CPLD designs. I did it for several years in the mid '90s. But after I spent a few days learning Verilog (mostly from the Xilinx "XST User Guide"), I was immediately designing stuff ten times faster.

In case you are wondering what steps are needed to build an FPGA or CPLD project, here's my quickie guide to building a simple project using Xilinx ISE software:
#754738
Older version with a Verilog example:
#545653

Al.tera has nice FPGAs and CPLDs too, but I'm not very familiar with them.

Here's a site for fun little FPGA projects:
https://www.fpga4fun.com/

Good luck!

Calm: The Xess web site works fine for me. Try again.
 

    madhouse

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Thanks echo47.

I did have a serious bash at the xilinx stuff last night, and have made some (slow) progress..... I'll carry on for a few days and see how I get on! Yes, I had already seen the fpga4fun site, but I'll take another look.

Cheers, D.
 

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