Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

odd number divider of the clock,with 50% duty cycle

Status
Not open for further replies.

kevin_007

Newbie level 4
Joined
Dec 15, 2008
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,318
clock divide by odd

for designing a clock divide by 5,as shown in the figure,how do we work out the inputs of the various D flipflops which are forming the shift register.Is there any way by which we can work out the I/Ps of the D flipflops by using the K-maps,or via any other method??
eg the I/P for A is Ad=A*B*C*(in the figure)
where star means bar or complementary
how do we work this out?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top