hamid159
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Hy guyz,
I am making a wireless communication link between two same microcontrollers i.e, PIC16F73 through NRF24L01. I don't know why it is not running properly. What i am doing is, sending a character 'A' from one microcontroller to other through NRF24L01. and checking the same character in receiver and comparing them as it also equals to 'A' or not. If is equal to 'A' then turn ON the LED (PORTB.B3 pin).
I need your help i don't know what is the problem in code. I tried so much but nothing happened.
Here is the Code.
NRF24L01_16F73.c
and here is nRF24L01.h
I am making a wireless communication link between two same microcontrollers i.e, PIC16F73 through NRF24L01. I don't know why it is not running properly. What i am doing is, sending a character 'A' from one microcontroller to other through NRF24L01. and checking the same character in receiver and comparing them as it also equals to 'A' or not. If is equal to 'A' then turn ON the LED (PORTB.B3 pin).
I need your help i don't know what is the problem in code. I tried so much but nothing happened.
Here is the Code.
NRF24L01_16F73.c
Code:
/*================================================================================
*
* nRF24L01
* PIC16F73
*
*
================================================================================*/
#define RX_mode // define TX_mode or RX_mode
//#define chn 83
#include "nRF24L01.h"
#ifdef RX_mode
sbit LED at PORTB.B3; sfr;
sbit LED_tris at TRISB.B3; sfr;
#endif
#ifdef TX_mode
sbit LED1 at PORTB.B4; sfr;
sbit LED1_tris at TRISB.B4; sfr;
#endif
const char test[] = "A";
// Pipe Addresses
// adr0 should be unique
// adr1 through adr5 must differ only in the lowest significant byte
// Bytes are arranged lowest to highest
const char adr0[] = {0x78,0x78,0x78,0x78,0x78}; // LSB first
const char adr1[] = {0xf1,0xb4,0xb5,0xb6,0xb3};
const char adr2[] = {0xb3,0xb4,0xb5,0xb6,0xb3};
const char adr3[] = {0x83,0xb4,0xb5,0xb6,0xb3};
const char adr4[] = {0xcf,0xb4,0xb5,0xb6,0xb3};
const char adr5[] = {0x75,0xb4,0xb5,0xb6,0xb3};
char Data_In[1], stat;
char Data_Out[1] = {'A'};
short dataLength = 1;
int hbyte;
// You can change these pins as long as your microcontroller supports SPI on the required pins
sbit Irq_pin at PORTB.B2; sfr;
sbit Mosi_pin at PORTC.B5; sfr;
sbit Ce_pin at PORTB.B0; sfr;
sbit Sclk_pin at PORTC.B3; sfr;
sbit Csn_pin at PORTB.B1; sfr;
sbit Miso_pin at PORTC.B4; sfr;
sbit Irq_tris at TRISB.B2; sfr; //input
sbit Mosi_tris at TRISC.B5; sfr; // output
sbit Ce_tris at TRISB.B0; sfr; //output
sbit Sclk_tris at TRISC.B3; sfr; //output
sbit Csn_tris at TRISB.B1; sfr; //output
sbit Miso_tris at TRISC.B4; sfr; //input
// I use a procedure for any delay that is used more than once
void Comm_Delay() {Delay_us(10);} // You can experiment with this delay
void Delay_10() {Delay_ms(10);}
void Delay_100() {Delay_ms(100);}
void Delay_500() {Delay_ms(500);}
void Clear_Data(char dat[]){
char i;
for(i=0;i<dataLength;i++)dat[i] = ' ';
}
void toggleCSN(){
Csn_pin = 1;
Delay_us(20); // You can experiment with this delay
Csn_pin = 0;
Comm_Delay();
}
char Get_Status(){
char s;
Ce_pin = 0;
toggleCSN();
SPI1_Write(STATUS);
Comm_Delay();
s = SPI1_Read(NOP);
Comm_Delay();
Csn_pin = 1;
return s;
}
char *getConst(char dest[], const char source[]){
int i = 0;
while (source[i]) // while (source[i] != '\0')
{dest[i] = source[i]; i++;}
dest[i] = '\0';
return dest;
}
char Get_FIFO_Flags(){
char s;
Ce_pin = 0;
toggleCSN();
SPI1_Write(FIFO_STATUS);
Comm_Delay();
s = SPI1_Read(NOP);
Comm_Delay();
Csn_pin = 1;
s = 'A';
return s;
}
void makeMsg(){ // Put your data in here
Clear_Data(Data_Out);
getConst(Data_Out, test);
}
char readBuffer(){
char i, s,y;
Ce_pin = 0;
Clear_Data(Data_In);
s = Get_FIFO_Flags();
if((s & 2) != 0){
toggleCSN();
SPI1_Write(R_RX_PAYLOAD);
for(i=0; i < dataLength; i++){Comm_Delay(); Data_In[i] = SPI1_Read(0); y = Data_In[0];}
Comm_Delay();
}
toggleCSN();
SPI1_Write(FLUSH_RX);
Comm_Delay();
Csn_pin = 1;
Ce_pin = 1;
return y;
}
void sendBuffer(){
char i, j;
do{
toggleCSN();
SPI1_Write(STATUS | W_REGISTER);
Comm_Delay();
SPI1_Write(0xff); //clear flags
Comm_Delay();
toggleCSN();
SPI1_Write(FLUSH_TX);
Comm_Delay();
toggleCSN();
SPI1_Write(W_TX_PAYLOAD);
for(i = 0; i < dataLength; i++) {Comm_Delay(); SPI1_Write(Data_Out[i]);}
Comm_Delay();
Csn_pin = 1;
Ce_pin = 1;
Delay_10();
j = (Get_Status() & 0x20); // keep trying until ack is received
}while(j==0);
}
char init_Radio(){
char i;
Ce_pin = 0; // must be in standby or power down to write
Comm_Delay();
toggleCSN();
SPI1_Write(CONFIG | W_REGISTER);
Comm_Delay();
#ifdef RX_mode
SPI1_Write(PRIM_RX + PWR_UP + 0x07);//CRCO + EN_CRC + 0x07); // Receiver
toggleCSN();
SPI1_Write(EN_AA | W_REGISTER);
Comm_Delay();
SPI1_Write(ENAA_P0 + ENAA_P1 + ENAA_P2 + ENAA_P3 + ENAA_P4 + ENAA_P5);
Comm_Delay();
toggleCSN();
SPI1_Write(EN_RXADDR | W_REGISTER);
Comm_Delay();
SPI1_Write(ERX_P0 + ERX_P1 + ERX_P2 + ERX_P3 + ERX_P4 + ERX_P5);
Comm_Delay();
#endif
#ifdef TX_mode
SPI1_Write(PWR_UP + 0x07);//CRCO + EN_CRC + 0x07); // Transmitter
Comm_Delay();
toggleCSN();
SPI1_Write(EN_AA | W_REGISTER);
Comm_Delay();
SPI1_Write(ENAA_P0);
Comm_Delay();
toggleCSN();
SPI1_Write(EN_RXADDR | W_REGISTER);
Comm_Delay();
SPI1_Write(ERX_P0);
Comm_Delay();
toggleCSN();
SPI1_Write(RX_ADDR_P0 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr0[i]);} // This is the pipe in use by this transmitter
Comm_Delay();
// The addresses above and below must be the same
toggleCSN(); // Choose any of the 6 addresses used by the receiver
SPI1_Write(TX_ADDR | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr0[i]);} // This is the pipe in use by this transmitter
Comm_Delay();
#endif
toggleCSN();
SPI1_Write(SETUP_AW | W_REGISTER);
Comm_Delay();
SPI1_Write(AW5);
Comm_Delay();
toggleCSN();
SPI1_Write(SETUP_RETR | W_REGISTER);
Comm_Delay();
SPI1_Write(0xfaf);
Comm_Delay();
toggleCSN();
SPI1_Write(RF_CH | W_REGISTER);
Comm_Delay();
SPI1_Write(83); // Set your channel here. Obviously it must be the same for TX and RX.
Comm_Delay();
toggleCSN();
SPI1_Write(RF_SETUP | W_REGISTER);
Comm_Delay();
SPI1_Write(RF_PWR + LNA_HCURR);
Comm_Delay();
#ifdef RX_mode
toggleCSN();
SPI1_Write(RX_ADDR_P0 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr0[i]);}
Comm_Delay();
/* toggleCSN();
SPI1_Write(RX_ADDR_P1 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr1[i]);}
Comm_Delay();
toggleCSN();
SPI1_Write(RX_ADDR_P2 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr2[i]);}
Comm_Delay();
toggleCSN();
SPI1_Write(RX_ADDR_P3 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr3[i]);}
Comm_Delay();
toggleCSN();
SPI1_Write(RX_ADDR_P4 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr4[i]);}
Comm_Delay();
toggleCSN();
SPI1_Write(RX_ADDR_P5 | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr5[i]);}
Comm_Delay();
*/
toggleCSN();
SPI1_Write(TX_ADDR | W_REGISTER);
for(i=0;i<5;i++){Comm_Delay(); SPI1_Write(adr0[i]);}
Comm_Delay();
/* toggleCSN();
SPI1_Write(RX_PW_P1 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();
toggleCSN();
SPI1_Write(RX_PW_P2 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();
toggleCSN();
SPI1_Write(RX_PW_P3 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();
toggleCSN();
SPI1_Write(RX_PW_P4 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();
toggleCSN();
SPI1_Write(RX_PW_P5 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();*/
#endif
toggleCSN();
SPI1_Write(RX_PW_P0 | W_REGISTER);
Comm_Delay();
SPI1_Write(dataLength);
Comm_Delay();
Csn_pin = 1;
i = Get_Status();
return i;
}
// =============================================================================
// =============================================================================
void main(){
char txt[5], dat1;
// ADCON1 = 0x04; // digital not analog
// CMCON = 7; // Comparators off
//PORTA = 0;
//TRISA = 0; // outputs
Csn_tris = 0;
#ifdef RX_mode
LED_tris = 0;
#endif
#ifdef TX_mode
LED1_tris = 0;
#endif
Csn_pin = 1;
Ce_tris = 0;
Ce_pin = 0; // 1 = listen or transmit
SPI1_Init();
//SPI1_Init_Advanced(_SPI_MASTER_OSC_DIV16, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_LOW_2_HIGH);
Delay_ms(200);
stat = init_Radio();
#ifdef TX_mode
// Clear_Data(Data_Out);
#endif
do {
dat1 = 0;
dat1 = Get_FIFO_Flags();
#ifdef TX_mode
Delay_100();
// makeMsg();
sendBuffer();
Delay_100();
if(irq_pin == 0) LED1 = 1;
else LED1 = 0;
#endif
#ifdef RX_mode
Ce_pin = 1;
dat1 = readBuffer();
hbyte = (char)dat1;
if(hbyte == 0x41) LED = 1;
else LED = 0;
if((dat1 & 2) != 0) LED = 1;
else LED = 0;
if(dat1 == 'A') LED = 1;
else LED = 0;
Ce_pin = 0;
toggleCSN();
SPI1_Write(FLUSH_RX);
Comm_delay();
Ce_pin = 1;
Delay_500();
#endif
}while(1);
}
and here is nRF24L01.h
Code:
/* Memory Map */
#define CONFIG 0x00
#define EN_AA 0x01
#define EN_RXADDR 0x02
#define SETUP_AW 0x03
#define SETUP_RETR 0x04
#define RF_CH 0x05
#define RF_SETUP 0x06
#define STATUS 0x07
#define OBSERVE_TX 0x08
#define CD 0x09
#define RX_ADDR_P0 0x0A
#define RX_ADDR_P1 0x0B
#define RX_ADDR_P2 0x0C
#define RX_ADDR_P3 0x0D
#define RX_ADDR_P4 0x0E
#define RX_ADDR_P5 0x0F
#define TX_ADDR 0x10
#define RX_PW_P0 0x11
#define RX_PW_P1 0x12
#define RX_PW_P2 0x13
#define RX_PW_P3 0x14
#define RX_PW_P4 0x15
#define RX_PW_P5 0x16
#define FIFO_STATUS 0x17
#define DYNPD 0x1C
#define FEATURE 0x1D
/* Bit Mnemonics */
#define MASK_RX_DR 0x40 //6
#define MASK_TX_DS 0x20 //5
#define MASK_MAX_RT 0x10 //4
#define EN_CRC 0x08 //3
#define CRCO 0x04 //2
#define PWR_UP 0x02 //1
#define PRIM_RX 0x01 //0
#define ENAA_P5 0x20 //5
#define ENAA_P4 0x10 //4
#define ENAA_P3 0x08 //3
#define ENAA_P2 0x04 //2
#define ENAA_P1 0x02 //1
#define ENAA_P0 0x01 //0
#define ERX_P5 0x20 //5
#define ERX_P4 0x10 //4
#define ERX_P3 0x08 //3
#define ERX_P2 0x04 //2
#define ERX_P1 0x02 //1
#define ERX_P0 0x01 //0
#define AW3 0x01 //0 3 bytes
#define AW4 0x02 //0 4 bytes
#define AW5 0x03 //0 5 bytes
#define ARD 0x00 //4
#define ARC 0x01 //0
#define PLL_LOCK 0x10 //4
#define RF_DR 0x08 //3
#define RF_PWR 0x06 //6
#define RX_DR 0x40 //6
#define TX_DS 0x20 //5
#define MAX_RT 0x10 //4
#define RX_P_NO 0x02 //1
#define TX_FULL 0x01 //0
#define PLOS_CNT 0x10 //4
#define ARC_CNT 0x01 //0
#define TX_REUSE 0x40 //6
#define FIFO_FULL 0x20 //5
#define TX_EMPTY 0x10 //4
#define RX_FULL 0x02 //1
#define RX_EMPTY 0x01 //0
#define DPL_P5 0x20 //5
#define DPL_P4 0x10 //4
#define DPL_P3 0x08 //3
#define DPL_P2 0x04 //2
#define DPL_P1 0x02 //1
#define DPL_P0 0x01 //0
#define EN_DPL 0x04 //2
#define EN_ACK_PAY 0x02 //1
#define EN_DYN_ACK 0x01 //0
/* Instruction Mnemonics */
#define R_REGISTER 0x00
#define W_REGISTER 0x20
#define REGISTER_MASK 0x1F
#define ACTIVATE 0x50
#define R_RX_PL_WID 0x60
#define R_RX_PAYLOAD 0x61
#define W_TX_PAYLOAD 0xA0
#define W_ACK_PAYLOAD 0xA8 // and with ack pipe number
#define FLUSH_TX 0xE1
#define FLUSH_RX 0xE2
#define REUSE_TX_PL 0xE3
#define NOP 0xFF
/* Non-P omissions */
#define LNA_HCURR 0x01 //0
/* P model memory Map */
#define RPD 0x09
/* P model bit Mnemonics */
#define RF_DR_LOW 0x10 //5
#define RF_DR_HIGH 0x08 //3
#define RF_PWR_LOW 0x02 //1
#define RF_PWR_HIGH 0x06 //2
Last edited: