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not gate - Inverter ?help

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kartikkg

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hello i am using multisim software for simulating a NOt gate (inverter) ,

what i am doing is taking a virtual depleted mode nmos trans and shorting its drain (source doesnt matter) (node 1) and gate and giving vcc ,now connecting node 1 with the source of a enhancement nmos trans and then giving ground to the node left and the input is a clock source of 10 , or 100 or 1000 Hz , but the circuit is not working , i am taking the output from Node !

and input is givern to the gate of enhancement n mos trans

plz clarify
 

kartikkg

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**broken link removed**

this is the image
 

keith1200rs

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Try a DC sweep of the input voltage first and look at the output voltage.

Keith
 

dedalus

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Hi.

kartikkg said:
what i am doing is taking a virtual depleted mode nmos trans and shorting its drain (source doesnt matter) (node 1) and gate and giving vcc

Connection of M2 is wrong. You must connect drain to Vdd, source to output node and short gate and source.

kartikkg said:
now connecting node 1 with the source of a enhancement nmos trans and then giving ground to the node left

From schematic you've connected drain of M1 to the output node instead of source and this is actually right.
 

kartikkg

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is the schematic correct?? i am still not getting not function from this
 

keith1200rs

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What voltage are you getting on the output when you do a DC sweep? Can you post your netlist & models? Change M2 for a resistor, say 100k and see what happens.

Keith.
 

frankliner

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The diagram from dedalus should work.

The problem was likely the diode from source to drain which is not drawn, but was likely modeled.
 

kartikkg

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hi Keith

i am not good at this S/W can u plz check the ckt yourself in multisim and do the dc sweep i did it but i dont know what to figure out with it !

I would be thankful to you :)
 

keith1200rs

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kartikkg said:
hi Keith

i am not good at this S/W can u plz check the ckt yourself in multisim and do the dc sweep i did it but i dont know what to figure out with it !

I would be thankful to you :)

I would happily do that if you could either send me the device models or point me in the right direction to get them. They are not device names I recognise.

One point to watch out for is to make sure that you can have the depletion NMOS in its own well, as you have drawn.

Keith.
 

kartikkg

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thanks keith

they are the models present in the multisim and they are virtual . i think they got the ideal characteristics
i am using multi sim 2001 i hope that the edition should nt be a problem **broken link removed**
 

keith1200rs

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I don't use Multisim, so I don't have those models. This is an example of what I would expect froma DC sweep though.

Keith.
 

kartikkg

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keith which is that software u sued for schematics

u are getting the right curve for it.
But the output should be taken from the junctions of the two transistors in ur pdf its marked Q1-G , if u taking from there only its corect. Can u plz aplly clock and give me the output
 

keith1200rs

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Yes, my output is from the junction of the two transistors - marked Q1-G on the schematic. The software is SIMetrix.

While my circuit works, it doesn't help you much. You really need to know what the models are that you are using. What you have drawn will work, but it depends on the characteristics of the transistors. For example, if the NMOS is quite weak and the depletion one is strong then the NMOS may not be able to pull down the depletion load.

As I mentioned earlier, replace the depletion MOS with a resistor, say 100k, to check your simulation circuit is OK.

Keith.
 

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