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Noob question regarding Voltage-Mode and Current-Mode PWM Power Supply Controller

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AMSA84

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Hi guys,

First let me ask you guys a noob question: What does a Voltage-Mode controller? It controls the output voltage of the power-supply that we need? So there is no control for the current, right? And what about the Current-Mode controller? It controls the output voltage and the output current, right?

Now, I have read that in this post: https://www.edaboard.com/threads/56315/ that "In voltage-mode control ... output of the switching power supply is divided (usually using a voltage divider), is subtracted from a reference and is compensated using an error amplifier. Then the error voltage at the output of the error amplifier is compared to a sawtooth to generate the driving signal for the switching transistor. So voltage-mode control is a single loop control technique" and I agree with that. It make sense. But in this kind of operation we can't control the current, right?

Imagine that I want to design a power-supply of 12V @ 1A. We select all the components in the circuit to withstand the currents and voltages and then we implement the controller in order to set the voltage at 12V, but we need to take care in not exceeding 1A, right?

Now about the Current-Mode. In the same post that I posted the link, the Current-mode "is multi-loop control. The outer loop is a voltage-loop - so you still have the voltage being sensed and subtracted from a reference and compensated - but now the error amplifier output provides a reference for the inner current loop. In the inner loop a current in the system is sensed (by using a current sense resistor or otherwise) and compared to the reference (from the voltage loop) and this is used to generate the switching signal for the transistor. Usually the inner current loop is faster than the outer voltage loop. There are also many types of current-mode control: peak current-mode control, average current-mode control, hysteretic current mode control"

About this last statement, I don't understand what is in BOLD.So the reference from the E/A output is used as reference to the current loop? How does it work? Can someone give an example? I can't idealize it.

Now, let's imagine that I want that same power supply, but now implemented with the Current-Mode PWM controller. What will be that difference? It is the fact that the power supply will supply a constant and continuous 12V and 1A?

My DOUBT is right here. Is that, if in the Current-Mode operation the power supply will supply a continuous voltage and current. Imagine a varying load, like a PSU from a computer. The PSU utilization will vary along the time, depending of the utilization of the CPU, GPU, etc. So does not make sense to have a Current-Mode of operaton?

Imagine that I want to supply a load with that 12V @ 1A power supply (from the preview example) implemented with a Current-Mode controller, and that load needs 12V @ 500mA. I can't use the 12V @ 1A power supply implemented with a Current-Mode because it was projected with a Current-Mode controller @ 1A right? This is what I don't understand quite well yet.

Sorry for the long text.

Best regards.
 

Hi guys,

First let me ask you guys a noob question: What does a Voltage-Mode controller? It controls the output voltage of the power-supply that we need? So there is no control for the current, right? And what about the Current-Mode controller? It controls the output voltage and the output current, right?

Now, I have read that in this post: https://www.edaboard.com/threads/56315/ that "In voltage-mode control ... output of the switching power supply is divided (usually using a voltage divider), is subtracted from a reference and is compensated using an error amplifier. Then the error voltage at the output of the error amplifier is compared to a sawtooth to generate the driving signal for the switching transistor. So voltage-mode control is a single loop control technique" and I agree with that. It make sense. But in this kind of operation we can't control the current, right?
Don't think of voltage mode and current mode as referring to what is being sensed or control on the output of the converter. The terms actually refer to what is effectively manipulated at the input of the converter.

Think of a simple buck converter. In voltage mode, the output of the error amplifier directly sets the duty cycle of the power switch in the converter. The duty cycle effectively determines the average voltage applied to the LC. Now in a current mode control scheme, the error amplifier output directly sets the peak current in the inductor/source voltage.

So a voltage mode controller works by modulating the voltage applied to the converter input, while a current mode controller works by modulating current applied to the converter input.

What's important is that these two modes of operation are completely independent of what is being controlled on the converter output. You can make output current-regulated and output voltage-regulated converters using both current and voltage mode control, in any combination.
 
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    AMSA84

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Hi mtwieg, thanks for the reply.

I didn't understood "modulating the voltage applied to the converter input" and "current mode controller works by modulating current applied to the converter input". But the control scheme is not to set the output voltage and current to the desired value?

EDIT: Another question.

Looking to the UC3845 datasheet and application notes, we have a voltage feedback input. That voltage feedback is assured by, for example, a resistive divider that takes a sample from the output voltage. One interesting thing is that the non-inverting pin is connected to a voltage reference value of 2.5V. Now, imagine that we want an output voltage of 7VDC. What we need to do is calculate the values of the resistors in order to get out from that resistor divider 2.5V. So that 2.5V that we took from the voltage divider will have a correspondence to the 7VDC. If the voltage goes to 7.1VDC, the voltage at the Voltage Feedback Input will go up to 2.51V (suppose) creating a voltage error at the output of the Error amplifier, that will be applied to the current loop.

Am I right? Thinking right?
 
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Hi mtwieg, thanks for the reply.

I didn't understood "modulating the voltage applied to the converter input" and "current mode controller works by modulating current applied to the converter input". But the control scheme is not to set the output voltage and current to the desired value?

EDIT: Another question.

Looking to the UC3845 datasheet and application notes, we have a voltage feedback input. That voltage feedback is assured by, for example, a resistive divider that takes a sample from the output voltage. One interesting thing is that the non-inverting pin is connected to a voltage reference value of 2.5V. Now, imagine that we want an output voltage of 7VDC. What we need to do is calculate the values of the resistors in order to get out from that resistor divider 2.5V. So that 2.5V that we took from the voltage divider will have a correspondence to the 7VDC. If the voltage goes to 7.1VDC, the voltage at the Voltage Feedback Input will go up to 2.51V (suppose) creating a voltage error at the output of the Error amplifier, that will be applied to the current loop.

Am I right? Thinking right?

"modulating the voltage applied to the converter input"

In general, for voltage-controlled, the error amplifier looks at a voltage being applied by/to the converter. The error amp runs that sensed level through a comparator and signal conditioning circuit in order to produce a PWM signal. That PWM signal then drives the switching-element in the converter (a transistor, generally). By adjusting (modulating) the duty cycle of pulses going into the transistor, the error amp can control (modulate) the average voltage of the converter.
 

So, we are not controlling the current/imposing the current that we want. The controller only stabilize the current when there is load variations? The current limiter is another thing?

BTW, there is any model of the UC3845 for PSPICE or something? So that I can study the waveforms?
 

Dear AMSA84,
I am not sure where exactly you are stuck, but I will give an answer to your question about the difference in CMC (Current Mode Control) and VMC (Voltage Mode Control) which haven't been written so far in this thread.

Please have a look at the link:
**broken link removed**

It is the basic schematic of a Current Mode Control loop. You can clearly see the output voltage fed back through a resistive divider, right? The feedback goes into an error amplifier. In VMC, the output of that error amplifier would be compared to a sawtooth signal and hence a duty cycle would be adjusted that matches with the desired output voltage. In CMC, you have your inner control loop as already mentioned. The output of your error amplifier goes into another comparator which also receives the current through the inductance/switch. In the schematic, this is called Vsense. It means that that the latch (RS latch) resets as soon as the current measured reaches its peak value (voltage across the sense resistor). If that happens, the switch opens.

What can be concluded is, that every time the current reaches its maximum peak value, the switch automatically opens. In that case you control your current and avoid extremely large currents during the start-up phase as you would have in VMC.

There is no official Spice model for an UC384x PWM controller, unfortunately. Though, there is a LTSpice group which has designed an unofficial model of the UC384x series.

**broken link removed**

But I did not manage to make the simulation work. If you manage to do so, I highly appreciate if you would be so kind and send your simulation file to me.

Kindly,
al3ko
 
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    AMSA84

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So, we are not controlling the current/imposing the current that we want. The controller only stabilize the current when there is load variations? The current limiter is another thing?
That's the basic theory. The feedback loop will always try to drive the circuit back to a steady-state condition (a target output voltage, in most cases). The current limiter is an additional function that can be tied into the basic switch-mode supply topologies.

BTW, there is any model of the UC3845 for PSPICE or something? So that I can study the waveforms?
It doesn't appear that TI offers anything like that (it's a complex device, so the SPICE model would be pretty ugly). For learning the basic SMPS concepts and waveforms, I googled "smps spice model" and found this little website. It looks like it talks about the fundamental topologies and has SPICE files you can download. The more complex, integrated controllers like the UC3845 will act very similar, but will generally have a lot of the feedback and ancillary circuits pulled inside the package.
 
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Al3ko, and how the SR Latch knows that the peak currents has been reached? There is no reference current set, (like the voltage reference, with the voltage divider) unless the error output from the error amplifier. But how the SR Latch knows that, with the error voltage that comes from the E/A, has been reached the current peak value?

So, in matter of fact, the current mode doesn't work in the same way has the voltage reference. So, for example:

If we have a 12V @ 5A, that means that we can supply to a load 12V @ 1A, 3A, or 5A. But more than 5A, we can not supply because will damage the components, so we need a current limiter/protection in order to limit the current if the load needs more than 5A.

With that I thought that with the Current Mode Control, we could limit the current to 5A or 3A, or 1A accordingly to the design, but now I see that it doesn't make any sense. So the Current Mode Control, the current will be "forced" to get back to a steady-state condition, but to a new value. For example, if the load change from 1A to 2A, what the inner control loop will do is to smoothly pass from one steady-state condition to another, correct?

But with the outer control loop, the voltage control mode, the voltage will be forced to get back to the 12V. Is that it?

Best regards, and thanks!
 

Al3ko, and how the SR Latch knows that the peak currents has been reached? There is no reference current set, (like the voltage reference, with the voltage divider) unless the error output from the error amplifier. But how the SR Latch knows that, with the error voltage that comes from the E/A, has been reached the current peak value?
Please consult the datasheet of your PWM controller. On the very first page, there is a block diagram. You can clearly see the zener diode (1V) at the second comparator. Also, in the application note, there is a section about dimensioning the sense resistor. As a matter of fact, there is an internal reference.
Your peak value can be limited to I_peak=1V/R_sense

where I_peak is the maximum peak current you allow to be in the circuit, 1V is the internal reference and R_sense is the sense resistor you will have to determine. Once you know your maximum peak current, you can easily determine the sense resistor and hence your inner control loop is all set.

Please have a closer look at
http://www.soloelectronica.net/PDF/AppNote03.pdf
 
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Thank you al3ko, I have read that an I think that I have understood.

By the way, can you tell me if the compensation circuit is needed? (Between pin 1 and 2) Is a feedback circuit right? For what is that for? It's to implement a PI compensator? What are the benefits.

Another question, regarding the voltage feedback, I have noticed that in the E/A the non-inverting input has a 2.5V reference. Now, when we sample the output voltage through the voltage divider, we have to design the resistors in order to get in the inverting input, the same value of the non-inverting input? Taking the example of the 12V, since that it is the voltage that we want, we have to design the resistor in order to get in the inverting pin of the E/A, 2.5V so that if exists any variation in the voltage, 12.1V, the voltage divider would sample 2.51V (for example) provoking an error of 0.1V.

Am I thinking right?
 

By the way, can you tell me if the compensation circuit is needed? (Between pin 1 and 2) Is a feedback circuit right? For what is that for? It's to implement a PI compensator? What are the benefits.
If you want to use a feedback control, you will have to implement a controller like P-, PI- oder PID. That is the compensator and stabilizes your feedback control. So yes, you will have to deal with that stuff in order make your closed loop control work. Though you will have to know about your SMPS transfer function.

Now, when we sample the output voltage through the voltage divider, we have to design the resistors in order to get in the inverting input, the same value of the non-inverting input?
Yes
 

Ok.

About the feedback control loop for the compensator, you said "If you want". So if I don't implement the feedback control what are the drops? Is mandatory to design that feedback control loop? If I don't implement what happens?

How can I know my SMPS transfer function? How do we determine that TF?

feedback control
 

Your control might not work (properly). If you are unlucky, you won't get your output voltage stable. What is your background? It appears that you have no real clue about control theory, is that true?
 

Okay.

I had already a course of control theory but the problem is that there subjects that are applied to different areas specifically. I know more or less how the control theory of converters works but one thing is theory and other is the practical reality.

On other hand, there are some things that I wanted to be sure.

About the SMPS transfer function, you are referring to have the block for the controller, converter, filter and then load? I have studied one type of converter transfer function with the delay model.
 

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