Nonoverlapping circuit problem

[AMSA84]

Hi guys,

I am trying to design a non overlapping circuit, based on 1 inverter and 2 nand. It's the typical non overlapping circuti (along with those using NOR gates).

The problem here is that I can't get the non overlapping effect. I am using 2 nand, 1 inverter in the bottom nand and two inverter doing the delay. I get the waveform but I can't rid of the overlapping effect between the waveform. The overlapping is something like roughly speaking 0.3 ns.

Anyone can give a tip on how to do this?

 

[dick_freebird]

You may need more complexity if you want -both- edges to not overlap.
A simple NAND-inverter lineup may delay one edge usefully but not help
the other when order of arrival is reversed.

But maybe some pictures would help.

I think it's also probable that a single inverter delay in a tight, lightly
loaded nonoverlap "nugget" may not be all you need to make heavily
loaded clocks in an analog block truly not cross-conduct. You might
want to look at a replica scheme which waits for gate drive transition
endpoints before next phase is allowed to fire.

 

[AMSA84]

I see. Where can I find more information about the replica scheme? By the way, while I was searching for non overlapping circuits, the basic ones, I found several types of circuits that does the non overlapping job. However, I can't really tell what are the main differences between them (apart from the detail that if we use NAND gates the rise and fall times are better than the NOR gates, etc).

Here are the scheme (that of course you know them, but for convenience I post it here):

 

[erikl]

Better use this scheme: (Baker, CMOS Circuit Design, Layout and Simulation, 3^rd Edition, Figure 14.9)

 

[AMSA84]

I have tried, but without success. The reason is because of the frequency (>300MHz). There is a time where, even without delays, the two non overlapping waveforms are too much non-overlaped that it doesn't fit to my application.