Hello,
I want to design (using only digital logic components) a Non-Overlapping clock generator with 4 output clocks and one input clock.
I was able to design it using flip-flops but with half the frequency of the input clock(Fin). To overcome this issue, I can use a frequency multiplier (Fin*2) , but this solution will increase the complexity of the design.
Is there any other method/way to design Non-Overlapping clock generator (with output frequencies == input frequency).
Thank you.
some frequency is input
and you get four output pulses at the same frequency, that do not overlap one another?
The output signals should be 45°, 90°, 135°, 180° phase shifted from the input signal.is there a specification for the separation of the output pulse?
or can one have a starting rising edge when another has an ending falling edge?
could you sketch these five signals as a function of time?
First time mention. So you should go for PLL. What's your target hardware?And I'm looking for a general design
It really would help ... yourself.could you sketch these five signals as a function of time?
Not exactly.That way you have 4 pulses identical to the first pulse, exactly what you require.
The output signals should be 45°, 90°, 135°, 180° phase shifted from the input signal.
Not exactly.
It gives output signals: 0°, 90°, 180°, 270°
But OP wrote:
The output signals should be 45°, 90°, 135°, 180° phase shifted from the input signal.
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?