I have designed a sigma-delta ADC (OSR=2048, BW=50Hz, fs=200kHz)
by switched-capacitor.
I run FFT in Hspice, and get the very poor linearity behavior,
Can anyone suggest for me?
thank you!
Wave3x is right, it would be better with some more detail. You don't tell us
what thee input of your filter is. Apparently it is a 6Hz (approximately) signal
but if your filter has a pass band of 50, I don't understand what is wrong.
Beside this, the stop band seems to be less than -80dB from 50 Hz which
is pretty good. But of course it depends on what you're looking for.
So if you want some more accurate replies:
- what is the input set of your FFT? Could you draw at least a block diagram
to explain what you do?
Dora.
kuohsi said:
I have designed a sigma-delta ADC (OSR=2048, BW=50Hz, fs=200kHz)
by switched-capacitor.
I run FFT in Hspice, and get the very poor linearity behavior,
Can anyone suggest for me?
thank you!