[SOLVED] NMOS input OPAMP with no inputs

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nitishn5

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What are the methods used to prevent an Op-Amp from Overshooting during its initial powerup when the input signals are not present?

Lets say that there is an NMOS input Op-Amp. Initially, when both inputs are Zero, the output can sit anywhere depending on the offsets and other corner related parameters. (Input pair is effectively OFF.)
Is there any way to prevent it from going over a particular voltage?

This is a large signal behaviour of the Op-Amp which is usually not discussed anywhere.
 

Perhaps you can clamp the output with an additional nmos to GND, controlled e.g. by a C-R delay from VDD to GND.
 

This has been my approach too, using a branch
of an available POR circuit if available or
poor-boy-ing one if not. Whether you want to
clamp the output, or (say) connect the -IN to
OUT while breaking -IN to the normal source,
is a question that relates to the downstream
response and intra-amp recovery from initial
zero condition (i.e. clamping the output to GND
might make downstream stuff also not-right,
or still let the amplifier "wind up" internally).
Be sure you understand where the initialization
overshoot really comes from.
 

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