netlist transfer issue 。。。

[jayh]

now i met a issue about netlist transfer.

a netlist based on A std lib. the owner doesn't provide source code for security issue. and we want to transfer the netlist to another one based on B std lib. or from ASIC to FPGA......

is it feasible to do such netlist transfer? by any tool and any flow?

do u have any suggestion? thank you!

 

[ebuddy]

It should not be difficult. If you don't have lib A available to you, write the behavior model for each of the lib A cells used in the design, and then the design will become "gate-level RTL". Synthesis it to lib B.

 

[phoenixpavan]

I think you can specify both lib A and lib B in link library and specify target library as lib B...in Design Compiler...once check and let me know