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Negative setup and hold time

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bharat_in

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negative setup and hold time

Recently i heard about "-ve" setup and hold time.
Can any one please, explain in detail with examples about it?
Thanks in advance...
 

gliss

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what is negative setup time

By negative setup and hold times do you mean positive slack time?
Positive slack means the data arrival times are not violating the timing of the circuit. It basically tells you how much timing you have to lose and still be acceptable.
 

A.Anand Srinivasan

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slack time, setup time, hold time

A zero setup time means that the time for the data to propagate within the component and load into the latch is less than the time for the clock to propagate and trigger the latch.

A negative setup or hold time means that there is an even larger difference in path delays, so that even if the data is sent later than the clock (for setup time), it still arrives at the latch first.

slack is different from this because it is the required time - arrival time....
 

    bharat_in

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avimit

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setup time hold time slack time

Say a FF as setup time of 1ns.(positve 1ns)
Now re-design this FF, and put a buffer in the clock path with a propagation delay of 2 ns.
Now the setup time of this redesigned FF would be -1ns (negative).

So if the clock is dalayed w.r.t data, then you can see negative setup times.
Hope it helps
Kr,
Avi
http://www.vlsiip.com
 

bharat_in

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That was really nice explanation from you all....
Is there any specific application of negative setup/hold time?
 

Thinkie

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avimit explanation is the right one... it really has to do with the clock path.

There is not an application thing... but more of a library implementation
 

samirkag

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Negative setup time flops are used on hard-to-meet data paths.
Negative hold time flops already have an "inbuilt hold buffer" embedded and hold closure is eased.

Added after 3 minutes:

Please also refer to this discussion on similar lines for more info:
https://www.edaboard.com/ftopic46573.html
 

    bharat_in

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