Advanced Member level 2
process ( iARM7_CLK ) begin if ( rising_edge( iARM7_CLK ) ) then spiclkcon <= spiclkcon + 1; if ( spiclkcon = spiclk_gen ) then spiclkcon <= x"00"; spiclk <= not spiclk; end if; if ( iSD_INISTATUS(0) = '0' ) then ******* when initialization is ok if ( spiclkcon = spiclk_cap and spiclk = '0' ) then case readstatus is when x"00" => if ( sdread = '1' ) then datain1 <= x"FFFFFFFF"; readstatus <= x"01"; end if; when x"01" => outdata <= datain1; **** data is captured when situation "spiclkcon = spiclk_cap and spiclk = '0'" is met readstatus <= x"00"; when others => null; end case; else outdata <= x"FFFF0000"; **** x"FFFF0000" is sent out when "spiclkcon = spiclk_cap and spiclk = '0'" is not met end if; elsif ( iSD_INISTATUS(0) = '1' ) then **** when initialization is not finished readstatus back to x"00" readstatus <= x"00"; end if; end if; end process;
This process is for reading SD card ID (such as x”260032”).
The problem is:
At the beginning, the output ID data can be read properly but when the SD card is taken out from slot, the output ID data still is x”260032” instead of x”FFFF0000”.
I decided the reason for above problem is that ID data is captured inside spiclk clock domain ( 2.5MHZ) which is generated by a clock divider and the “outdata” register can not be updated properly since “outdata” register is synchronized with iARM7_CLK (50MHZ).
I tried use:
outdata <= x"FFFF0000";
to fix above problem.
But this time ID outdata is always x”FFFF0000”.
I have used scope to verify the input data, the looks fine.
How I can fix this problem?