That layout will be fine. You could also alternate sd ds but the matching texts say that a single repeated instance offers better matching than any change in orientation.
For instance, if LDD is an angled implant, alternating the orientations will make matching worse as some devices will get deeper LDD than others. Again, if equal number of A's and B's are affected equally it should wash out - but the safest rule is to just repeat a single instance in the same orientation.
But if i place the transistors as (source)-A-(Drain) (Drain)-B-(source) the current will flow in the opposite direction.So i felt arranging them as Source drain source drain is better.correct me if i am wrong
Your layout will work. It will cancel out linear gradients. However, if you iterate on the layout, you can cancel higher-order gradients (square or cube).
Can you make them 8 fingers instead of 10? If so, I would do:
Code:
A B B A
B A A B
B A A B
A B B A
You'll want to put dummies around the edges:
Code:
D D D D D D
D A B B A D
D B A A B D
D B A A B D
D A B B A D
D D D D D D
Square or cube gradients? I've never heard of such a thing in all the fabs I have used. Do you have any reputable information or link? It kind of sounds like somebody's research project rather than a substantial effect you see in production IC's.
What percentage of the total variation of the oxide thickness can be accurately modelled as a second order profile such as square or cube?