Need some help ......... urgent

[deepu_s_s]

HI,

This is the query.

The memory controller I need to design is for the CAN interface which is present on the FPGA. This would control the data transfers using the CAN interface, so there would be two interfaces.

* On the Controller-Interface side, where the controller will act as a master and the interface as the slave.
* On the Processor-Controller side, where the processor is the master and the controller, the slave.

So effectively, the memory controller block will be in between the Processor and Interface.

Here, I will be using the CAN interface and will be using the Microblaze processor, which is available on the EDK. My query is, what is the basic interface between the processor (Microblaze) and the memory controller.


Please help me as soon as possible

Thanks and Regards
Deepak

 

[deepu_s_s]

Hi

Sorry friends, I actually need the memory controller interface to the microblaze processor... So can any 1 provide me with the architecture of the microblaze?

Thanks and Regards
Deepak

 

[heythem2008]

What do you min by CAN?
1- Analog Digital Converter or
2- the controller area network bus

 

[deepu_s_s]

CONTROLLER AREA NETWORK