Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Need signal edge detection idea

Status
Not open for further replies.

EDA_hg81

Advanced Member level 2
Joined
Nov 25, 2005
Messages
503
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
4,875
Do any one has idea about how to detect the signal edge?

Thanks.
 

neoaspilet11

Full Member level 5
Joined
Sep 29, 2005
Messages
277
Helped
29
Reputation
56
Reaction score
8
Trophy points
1,298
Location
Cebu, Philippines
Activity points
4,048
IF you mean digital signal thats easy if you use microcontroller. Most external interrupts of MCUs can be configured to detect either on Rising or falling edge of a signal or you can poll a signal line in a loop. And can be even be switch back and forth as the program is running. Although the drawback here is you need to code plus teh latency in edge detection may be in the magnitude of microsecs which may not be acceptable in your application
 

    EDA_hg81

    Points: 2
    Helpful Answer Positive Rating

rberek

Full Member level 6
Joined
May 23, 2007
Messages
339
Helped
98
Reputation
202
Reaction score
83
Trophy points
1,308
Location
Canada
Activity points
4,043
If you sample the signal in question with a flip flop, whenever the input to the flip flop is at a different level than the output, you have detected an edge.
 

    EDA_hg81

    Points: 2
    Helpful Answer Positive Rating

avimit

Banned
Joined
Nov 16, 2005
Messages
413
Helped
91
Reputation
182
Reaction score
23
Trophy points
1,298
Location
Fleet, UK
Activity points
0
Hi, I dont know what do you need it for and what kind of output you would like to see when there is an edge in the input. But if you do this:

pass the input I1 through a dff to get a signal I1_delayed, then xor I1 and I1_delayed to get edge_pulse, then edge_pulse will be a one clock pulse, produced whenever I1 makes a transition from 0->1 or 1->0.
Kr,
Avi
https://www.vlsiip.com
 

    EDA_hg81

    Points: 2
    Helpful Answer Positive Rating

Iouri

Advanced Member level 2
Joined
Aug 17, 2005
Messages
682
Helped
87
Reputation
174
Reaction score
8
Trophy points
1,298
Activity points
4,814
litle comment:


If you are going to do one of the abome mentioned methods, make sure signal rising/filing time, still resanoble fast enought to avoid glitches otherwise you will have problems,

Try for example to detect risingfiling edge on signal from parallel port of the PC and use 100MHZ clock
 

    EDA_hg81

    Points: 2
    Helpful Answer Positive Rating

EDA_hg81

Advanced Member level 2
Joined
Nov 25, 2005
Messages
503
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Activity points
4,875
I am trying this method and let you know the result.

Thanks.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top