need nios II IDE help!

[wichayen]

nios ii ide

now i am using nios II . i have problem about register access. please see below

#define LED (*(volatile unsigned int*)(GPIO_LED_BASE+0x0))

int main(void)
{
LED = 1; <-- this line is not work ( line 1)
IOWR=32DIRECT(GPIO_LED_BASE, 0, 1); <-- this line is work ( line 2)
return 0;
}

LED = 1; this line is not work. the assambly code of line 1 and 2 is same but line1 is not run. i already try to bebug, only line2 is work.

can any one help me to solve is problem?

 

[Booleano]

using iord iowr altera nios ii

hi,
i don't the have the IDE installed but...

What does it mean it doesn't work? don't you get the desidered result?
or id doesn't compile correctly?

if it compiles, could you post the disassambled in the two cases you show?
trying what the compiler is doing could certainly help.


B.

 

[shitansh]

stwio stw nios

My Friend,

You are westing your time with this code.It just replaces the macro with the base address of the GPIO.Define your GPIO with some pointer variable and then try to write.Altera provided IOWR/IORD instruction are best to use.

HTH

 

[wichayen]

nios data cash

now, i just found some problem . below is the disassambled results


LED = 1; <-- this line is not work ( line 1)
0x04000224 <main+20>: movhi r3,2048
0x04000228 <main+24>: addi r3,r3,6144
0x0400022c <main+28>: movi r2,1
0x04000230 <main+32>: stw r2,0(r3) *******

IOWR=32DIRECT(GPIO_LED_BASE, 0, 1); <-- this line is work ( line 2)
0x04000234 <main+36>: movhi r3,2048
0x04000238 <main+40>: addi r3,r3,6144
0x0400023c <main+44>: movi r2,1
0x04000240 <main+48>: stwio r2,0(r3) *******

i found that if we build nios with include Cash data memory(can config by SOPC bluider) the complier will compile line1 by using "stw" but line2 is "stwio".

i read in nios processor reference. they said
"Data transfers for I/O peripherals should use ldwio and stwio."

so, do anyone have some idea to set complier to compile line1 to use "stwio" ?

 

[Booleano]

nios stw r2,0(r3)

The IORD macro expands to the ldwio instruction, and the IOWR macro expands to the stwio instruction.
These macros should be used by HAL device drivers to access device registers.
All of these macros bypass the data cache when
they perform their operation.
Of course building a system without cache, the two examples behave in the same way.
You've just created an example of not portable implementation!
I don't know, probably there should be a way to force in C cache bypassing, but I would recommend to use the IORD an IOWR instruction instead.

B.