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Need information on DLL design

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cwwang

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how about dll design

i have never designed dll before. what is the most difficult part for dll design.
 

Re: how about dll design

VCO and low pass filter.
 

Re: how about dll design

Sorry, but usually there is no VCO in a DLL design. Which by the way makes it a lot easier to design compared to PLL.
Which is the most difficult part - depends on the time delay value that you want to achieve, the number of steps, etc. One usually uses bufferes for the delay cells the delay of which is controlled. Depending on the time step value, the design of those bufferes can be a tricky thing - you may find yourself in a situation when you can't make them fast enough to provide for small time delays. Otherwise, the loop is not difficult to stabilize, the filter is usually of 1st order, and people use PFD+charge pump.
 

how about dll design

DLL does not contain a VCO, and does not neccessarily contain a low pass filter. The original
question is far too open ended, you need to provide
a specification: input frequency range, output
frequency range, jitter requirement, function
(phase shifting only or frequency synthesis as well).
then you can get a decent answer.
 

Re: how about dll design

jitter and #of degrees
 

Re: how about dll design

it seems that dll is a digital design not many analog circuits in it. right?
 

Re: how about dll design

is it DPLL? digital PLL?

ive info abt it.. i can post them if u want it..

with regards,
 

Re: how about dll design

Dear Friend,
When you are working on DLL for higher frequency it is the delay stages(VCDL) is really challenging and crucial design and other thing that is of interest is you should take care of that your DLL should not able to lock at 2T,3T,4T.......etc.......except that it should always lock to 1T, which can obtained using start controlled PFD and false lock decoding circuit.
 

Re: how about dll design

Sreenivas said:
Dear Friend,
When you are working on DLL for higher frequency it is the delay stages(VCDL) is really challenging and crucial design and other thing that is of interest is you should take care of that your DLL should not able to lock at 2T,3T,4t.......etc.......except that it should always lock to 1T, which can obtained using start controlled PFD and false lock decoding circuit.

So you mean the filter is the most crictical part, to avoid positive feedback of unwanted (2T, ...) delays?
 

how about dll design

Does Sreenivas means the limit of designing a analog DLL ? As far as I know, digital DLL has less limit than analog. Is there any doc. for implementation of all digital DLL ?
 

Re: how about dll design

dll same as pll
but only one cap
pll
has also res
and is 3rd
while dll only 1st
 

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