Need IC to store old state

[MrUmunhum]

Hi group,
I need to create an interrupt on a state change of a GPIO pin. I'm thinking something like the attached circuit but I don't know which IC to use. I don't want to use a Micro CPU. The circuit will use an XOR IC to detect a change of state, then trigger the Sync pulse and store the new state.

I need to monitor 8 GPIO pins.

Any ideas?

Thanks for your time.



---------- Post added at 21:25 ---------- Previous post was at 20:40 ----------

Will this work?

 

[rho-bot]

How about using only a XOR:

Every state change of the input line will generate a short strobe (length depends on RC lowpass)

 

[rho-bot]

Another question: What uC do you use?
Some uC (eg PIC controllers) have a "port change interrupt" feature already built in

 

[krishna1234]

the second circuit that you have given might work it depend on the timing of the components.what i mean is that the flipflop input required to be present for some delay before the clock arrive inorder to work correctly.here the clock is fed from the xor.the only time delay between the input and the clock is the delay in the xor.if this delay greater than the delay required between the input and the clock then the above circuit will work.if not it won't.

---------- Post added at 17:23 ---------- Previous post was at 17:22 ----------

refer the datasheet of both ics

---------- Post added at 17:23 ---------- Previous post was at 17:23 ----------

don't take my words as final truth.....
refer more.......

 

[rho-bot]

for the flipflop solution: both circuits are almost the same and should work.
First circuit shows solution with D-FF, second with JK-FF.
Propagation delay of the XOR is typical 5ns and should match the required data setup time for the FF

 

[MrUmunhum]

Another question: What uC do you use?
Some uC (eg PIC controllers) have a "port change interrupt" feature already built in

I don't want to use a uC.

 

[FvM]

Consider, that an interrupt input has to be asserted at least one CPU clock long, possibly longer depending on the processor family.

In case, that the processor, or what ever has to be interrupted is reading the GPIO states on interrupt, you would want that the next compare is done with the bit vector it has read, at least if the individual bits are expected to change at arbitrary times. To implement this feature, you need an acknowledge pulse to trigger state latching. The automatic latching is of no use for it.