rish_jain
Newbie level 5
sdram addressing
I want to design a sdram controller using an FPGA but I do not understand how the linear address from a microcontroller can be translated to the 2 stage address used by the SDRAMs. Any reference/description regarding this will be great!
Thx in advance.
I want to design a sdram controller using an FPGA but I do not understand how the linear address from a microcontroller can be translated to the 2 stage address used by the SDRAMs. Any reference/description regarding this will be great!
Thx in advance.