INS-ANI
Full Member level 3

I am working on a DTMF tutorial on Cadence SOC Encounter 9.1. Since this is my first time i am unable to even decide what to do to remove my errors.
Presently i have completed CTS and verified the design by connections and geometry.
I got almost all of the error after the verification step.
I am getting 20 connectivity/open violations and 1000(
) short violations.
The log file content is below:
I have also added the violation report for your reference.. please prompt me if you need any other files.
If required i will upload whole project file.
Presently i have completed CTS and verified the design by connections and geometry.
I got almost all of the error after the verification step.
I am getting 20 connectivity/open violations and 1000(
The log file content is below:
******** Start: VERIFY CONNECTIVITY ********
Start Time: Wed May 4 22:07:40 2011
Design Name: DTMF_CHIP
Database Units: 2000
Design Boundary: (0.0000, 0.0000) (1686.3850, 1663.3200)
Error Limit = 1000; Warning Limit = 50
Check all nets
**** 22:07:41 **** Processed 5000 nets (Total 6490)
Open violation {207.720 207.720 1478.665 1455.600} is too complicated to show its polygon outline. It will be marked with its bounding box.
Net VDD: special open.
VC Elapsed Time: 0:00:01.0
Begin Summary
20 Problem(s) (ENCVFC-200): Special Wires: Pieces of the net are not connected together.
20 total info(s) created.
End Summary
End Time: Wed May 4 22:07:41 2011
******** End: VERIFY CONNECTIVITY ********
Verification Complete : 20 Viols. 0 Wrngs.
(CPU Time: 0:00:00.9 MEM: 2.723M)
encounter 4> *** Starting Verify Geometry (MEM: 419.0) ***
VERIFY GEOMETRY ...... Starting Verification
VERIFY GEOMETRY ...... Initializing
VERIFY GEOMETRY ...... Deleting Existing Violations
VERIFY GEOMETRY ...... Creating Sub-Areas
...... bin size: 8320
VERIFY GEOMETRY ...... SubArea : 1 of 4
VERIFY GEOMETRY ...... Cells : 0 Viols.
**WARN: (ENCVFG-103): VERIFY GEOMETRY did not complete: Number of violations exceeds the Error Limit [1000]
VG: elapsed time: 1.00
Begin Summary ...
Cells : 0
SameNet : 0
Wiring : 0
Antenna : 0
Short : 1000
Overlap : 0
End Summary
Verification Complete : 1000 Viols. 0 Wrngs.
**********End: VERIFY GEOMETRY**********
*** verify geometry (CPU: 0:00:00.7 MEM: 46.3M)
encounter 4> Redoing specifyClockTree ...
Checking spec file integrity...
Writing Netlist "DTMF_CHIP_verify.enc.dat/DTMF_CHIP.v.gz" ...
**WARN: (ENCSYC-6105): Option '-pt' is obsolete. The option is ignored in this release, but to avoid this warning, and to ensure compatibility with future releases, donot use this option.
**WARN: (ENCSYC-6108): Option '-filePrefix' is obsolete. This option still works in this release, but to avoid this warning, and to ensure compatibility with future releases, donot use this option. Use '<filename>' option instead.
Saving clock tree spec file 'DTMF_CHIP_verify.enc.dat/DTMF_CHIP.ctstch' ...
Saving configuration ...
Saving preference file DTMF_CHIP_verify.enc.dat/enc.pref.tcl ...
Saving floorplan ...
Saving Drc markers ...
... 1020 Drc markers are saved ...
Saving placement ...
*** Completed savePlace (cpu=0:00:00.0 real=0:00:00.0 mem=439.0M) ***
Saving route ...
*** Completed saveRoute (cpu=0:00:00.2 real=0:00:00.0 mem=439.0M) ***
*** Completed saveYieldMap (cpu=: 0:00:00.0 real=0:00:00.0 mem=: 0.000M) ***
Creating constraint file...
encounter 4>
I have also added the violation report for your reference.. please prompt me if you need any other files.
If required i will upload whole project file.
Code:
###############################################################
# Generated by: Cadence Encounter 09.11-s082_1
# OS: Linux i686(Host ID Ani.INS-ANI.com)
# Generated on: Wed May 4 22:22:37 2011
# Command: violationBrowserReport -all -no_display_false -report ...
###############################################################
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 1
***************** Report Summary *****************
Num Violation Total 1020
Verify 1020
Connectivity 20
Open 20
Short 1000
Short 1000
*************** End Report Summary ***************
Verify - Connectivity - Open Violations ( 20 )
Net VDD
False : No Bounds (1340.460, 395.520) (1351.020, 396.320)
Net VDD
False : No Bounds (1340.460, 405.600) (1351.020, 406.400)
Net VDD
False : No Bounds (1340.460, 425.760) (1351.020, 426.560)
Net VDD
False : No Bounds (1340.460, 445.920) (1351.020, 446.720)
Net VDD
False : No Bounds (1344.695, 455.180) (1345.505, 455.180) (1345.505, 455.520) (1345.270, 455.520) (1345.270, 456.000) (1351.020, 456.000) (1351.020, 456.800) (1340.460, 456.800) (1340.460, 456.000) (1344.930, 456.000) (1344.930, 455.520) (1344.695, 455.520)
Net VDD
False : No Bounds (1344.420, 1060.800) (1351.020, 1061.600)
Net VDD
False : No Bounds (1344.420, 1070.880) (1351.020, 1071.680)
Net VDD
False : No Bounds (1344.420, 1080.960) (1351.020, 1081.760)
Net VDD
False : No Bounds (1344.420, 1161.600) (1351.020, 1162.400)
Net VDD
False : No Bounds (1344.420, 1191.840) (1351.020, 1192.640)
Net VDD
False : No Bounds (1344.420, 1212.000) (1351.020, 1212.800)
Net VDD
False : No Bounds (1344.420, 1222.080) (1351.020, 1222.880)
Net VDD
False : No Bounds (1344.420, 1232.160) (1351.020, 1232.960)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 2
Net VDD
False : No Bounds (1344.420, 1242.240) (1351.020, 1243.040)
Net VDD
False : No Bounds (1344.420, 1252.320) (1351.020, 1253.120)
Net VDD
False : No Bounds (1344.420, 1262.400) (1351.020, 1263.200)
Net VDD
False : No Bounds (1344.420, 1272.480) (1351.020, 1273.280)
Net VDD
False : No Bounds (1344.420, 1282.560) (1351.020, 1283.360)
Net VDD
False : No Bounds (1344.420, 1292.640) (1351.020, 1293.440)
Net VDD
False : No Bounds (207.720, 207.720) (1478.665, 1455.600)
Verify - Short - Short Violations ( 1000 )
Regular Via of Net DTMF_INST/clk & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (654.200, 500.800) (654.580, 501.080)
Regular Via of Net DTMF_INST/spi_clk & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (654.200, 540.800) (654.580, 541.080)
Regular Via of Net ibiasI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (355.580, 540.800) (355.600, 541.080)
Regular Via of Net pllrstI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (355.580, 380.800) (355.600, 381.080)
Regular Via of Net refclkI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (355.580, 500.800) (355.600, 501.080)
Regular Via of Net vcomO & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (355.580, 420.800) (355.600, 421.080)
Regular Via of Net vcopO & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M1 Bounds (355.580, 460.800) (355.600, 461.080)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[23]
False : No Layer : M2 Bounds (653.590, 766.220) (655.190, 766.500)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[25]
False : No Layer : M2 Bounds (653.590, 776.300) (655.190, 776.580)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/sel_op_b[2]
False : No Layer : M2 Bounds (800.770, 640.220) (801.050, 640.500)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[8]
False : No Layer : M2 Bounds (769.040, 751.100) (769.420, 751.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1006 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[2]
False : No Layer : M2 Bounds (693.190, 655.340) (693.470, 655.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1023 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907
False : No Layer : M2 Bounds (745.940, 634.620) (746.320, 634.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1026 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1986
False : No Layer : M2 Bounds (702.380, 691.180) (702.760, 691.460)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 3
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1029 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 676.060) (687.530, 676.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1029 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 679.980) (687.530, 680.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1029 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1988
False : No Layer : M2 Bounds (686.590, 676.060) (686.870, 676.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1029 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1988
False : No Layer : M2 Bounds (686.590, 679.980) (686.870, 680.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1033 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 676.620) (687.530, 676.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1039 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1915
False : No Layer : M2 Bounds (703.040, 684.460) (703.420, 684.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1042 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907
False : No Layer : M2 Bounds (745.280, 640.780) (745.660, 641.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1052 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2004
False : No Layer : M2 Bounds (681.920, 696.220) (682.300, 696.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1095
False : No Layer : M2 Bounds (680.600, 715.260) (680.980, 715.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1861
False : No Layer : M2 Bounds (666.740, 705.180) (667.120, 705.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862
False : No Layer : M2 Bounds (685.930, 715.260) (686.210, 715.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 705.180) (687.530, 705.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 710.780) (687.530, 711.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1056 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1066
False : No Layer : M2 Bounds (744.670, 681.660) (745.660, 681.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1057 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2004
False : No Layer : M2 Bounds (681.970, 696.780) (682.250, 697.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1063 & Special Via of Net VDD
False : No Layer : M2 Bounds (694.510, 697.920) (694.790, 698.720)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1068 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1970
False : No Layer : M2 Bounds (709.690, 660.940) (709.970, 661.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1068 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 660.940) (709.310, 661.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1068 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 674.940) (709.310, 675.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1070 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[5]
False : No Layer : M2 Bounds (729.490, 756.140) (729.770, 756.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085
False : No Layer : M2 Bounds (681.310, 640.780) (681.590, 641.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072 & Regular Wire of Net scan_clkI
False : No Layer : M2 Bounds (672.730, 654.780) (673.010, 655.060)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 4
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1089 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090
False : No Layer : M2 Bounds (739.390, 710.780) (739.670, 711.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1089 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2029
False : No Layer : M2 Bounds (738.070, 710.780) (738.350, 711.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_940
False : No Layer : M2 Bounds (738.730, 721.420) (739.010, 721.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1095 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2038
False : No Layer : M2 Bounds (679.990, 731.500) (680.270, 731.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1097 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053
False : No Layer : M2 Bounds (686.540, 715.260) (686.920, 715.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1097 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053
False : No Layer : M2 Bounds (686.590, 714.140) (686.870, 715.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1097 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1988
False : No Layer : M2 Bounds (686.590, 685.020) (686.870, 685.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1100 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2039
False : No Layer : M2 Bounds (674.000, 741.580) (674.380, 741.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1119 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1123
False : No Layer : M2 Bounds (711.010, 740.460) (711.290, 740.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1132 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[7]
False : No Layer : M2 Bounds (755.890, 695.100) (756.170, 695.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1135 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2061
False : No Layer : M2 Bounds (747.310, 734.860) (747.590, 735.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1144 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1857
False : No Layer : M2 Bounds (695.780, 751.660) (696.160, 751.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1144 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7]
False : No Layer : M2 Bounds (703.040, 761.740) (703.420, 762.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1144
False : No Layer : M2 Bounds (709.030, 786.380) (709.310, 786.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1873
False : No Layer : M2 Bounds (709.690, 785.820) (709.970, 786.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1873
False : No Layer : M2 Bounds (709.690, 802.060) (709.970, 802.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1886
False : No Layer : M2 Bounds (709.690, 771.820) (709.970, 772.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 776.860) (736.370, 777.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1150 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 775.740) (736.370, 776.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1162 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1084
False : No Layer : M2 Bounds (730.150, 719.180) (730.430, 719.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1162 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794
False : No Layer : M2 Bounds (729.490, 684.460) (729.770, 684.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1162 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1800
False : No Layer : M2 Bounds (735.380, 735.980) (735.760, 736.260)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 5
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1172 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1183
False : No Layer : M2 Bounds (746.650, 777.420) (746.930, 777.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1173 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068
False : No Layer : M2 Bounds (739.390, 805.980) (739.670, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1174 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1170
False : No Layer : M2 Bounds (735.380, 797.580) (735.760, 797.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1174 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2071
False : No Layer : M2 Bounds (736.750, 791.420) (737.030, 791.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1174 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2085
False : No Layer : M2 Bounds (736.750, 797.580) (737.030, 797.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1174 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 791.420) (736.370, 791.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1174 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 797.580) (736.370, 797.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1183 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1186
False : No Layer : M2 Bounds (746.650, 755.580) (746.930, 771.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1186 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_935
False : No Layer : M2 Bounds (765.130, 790.860) (765.410, 791.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1201 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1198
False : No Layer : M2 Bounds (728.780, 825.580) (729.160, 825.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1201 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2102
False : No Layer : M2 Bounds (735.430, 826.140) (735.710, 826.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1211 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1778
False : No Layer : M2 Bounds (758.530, 794.780) (758.810, 795.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1219 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862
False : No Layer : M2 Bounds (685.930, 714.700) (686.210, 714.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1219 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1870
False : No Layer : M2 Bounds (685.270, 714.700) (685.550, 716.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1237 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 815.500) (763.430, 815.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1237 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2128
False : No Layer : M2 Bounds (766.450, 807.100) (766.730, 807.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1237 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933
False : No Layer : M2 Bounds (765.790, 806.540) (766.070, 806.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1268 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1170
False : No Layer : M2 Bounds (732.130, 806.540) (732.410, 806.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1286 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[11]
False : No Layer : M2 Bounds (779.650, 806.540) (779.930, 806.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1286 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[13]
False : No Layer : M2 Bounds (780.310, 806.540) (780.590, 806.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1286 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[13]
False : No Layer : M2 Bounds (780.310, 825.580) (780.590, 825.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1287 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 812.140) (763.430, 812.420)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 6
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1288 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1186
False : No Layer : M2 Bounds (746.650, 752.780) (746.930, 753.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1294 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2106
False : No Layer : M2 Bounds (745.280, 816.060) (745.660, 816.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1333 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2097
False : No Layer : M2 Bounds (762.440, 781.340) (762.820, 781.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1341 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1198
False : No Layer : M2 Bounds (728.830, 822.780) (729.110, 823.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1341 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1244
False : No Layer : M2 Bounds (730.150, 822.780) (730.430, 823.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1360 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802
False : No Layer : M2 Bounds (761.830, 797.580) (762.110, 797.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1384 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[11]
False : No Layer : M2 Bounds (777.010, 811.580) (777.290, 811.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1410 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 830.620) (763.430, 830.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1410 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802
False : No Layer : M2 Bounds (761.830, 830.620) (762.110, 830.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1436 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[16]
False : No Layer : M2 Bounds (800.110, 822.220) (800.390, 822.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1650 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[27]
False : No Layer : M2 Bounds (840.370, 798.140) (840.650, 801.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1650 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[27]
False : No Layer : M2 Bounds (841.030, 801.500) (841.310, 801.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[14]
False : No Layer : M2 Bounds (782.950, 806.540) (783.230, 806.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[7]
False : No Layer : M2 Bounds (765.130, 735.980) (765.410, 736.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1727 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1160
False : No Layer : M2 Bounds (762.490, 740.460) (762.770, 740.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1727 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1299
False : No Layer : M2 Bounds (796.810, 821.100) (797.090, 821.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1738 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1972
False : No Layer : M2 Bounds (720.910, 654.780) (721.190, 655.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1771 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1223
False : No Layer : M2 Bounds (763.760, 825.580) (764.140, 825.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1771 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1286
False : No Layer : M2 Bounds (778.990, 826.140) (779.270, 826.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1771 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933
False : No Layer : M2 Bounds (772.390, 826.140) (772.670, 826.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1772 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 815.500) (755.510, 815.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1771
False : No Layer : M2 Bounds (763.810, 822.780) (764.090, 823.060)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 7
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1776 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 799.820) (763.430, 800.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1776 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802
False : No Layer : M2 Bounds (761.830, 799.820) (762.110, 800.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1777 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 771.820) (755.510, 772.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1777 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 782.460) (755.510, 782.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1777 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 791.980) (755.510, 792.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1778 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1776
False : No Layer : M2 Bounds (757.870, 792.540) (758.150, 792.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1780 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2049
False : No Layer : M2 Bounds (755.890, 742.140) (756.170, 742.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1780 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7]
False : No Layer : M2 Bounds (756.500, 744.940) (756.880, 745.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1785 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090
False : No Layer : M2 Bounds (720.250, 704.620) (720.530, 704.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1786 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1213
False : No Layer : M2 Bounds (738.730, 705.740) (739.010, 706.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1789 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1788
False : No Layer : M2 Bounds (728.830, 694.540) (729.110, 694.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1789 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794
False : No Layer : M2 Bounds (729.490, 690.060) (729.770, 690.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1790 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2029
False : No Layer : M2 Bounds (737.410, 721.980) (737.690, 722.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1792 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1970
False : No Layer : M2 Bounds (709.690, 658.700) (709.970, 658.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1792 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1970
False : No Layer : M2 Bounds (710.350, 661.500) (710.630, 661.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1792 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 658.700) (709.310, 658.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1789
False : No Layer : M2 Bounds (728.170, 691.180) (728.450, 691.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1792
False : No Layer : M2 Bounds (703.040, 671.020) (703.420, 671.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1797
False : No Layer : M2 Bounds (728.170, 664.860) (728.450, 665.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2013
False : No Layer : M2 Bounds (729.490, 689.500) (729.770, 689.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1795 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716
False : No Layer : M2 Bounds (720.250, 630.700) (720.530, 630.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1795 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1972
False : No Layer : M2 Bounds (720.910, 660.380) (721.190, 660.660)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 8
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1798 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1045
False : No Layer : M2 Bounds (736.750, 690.060) (737.030, 690.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1798 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1137
False : No Layer : M2 Bounds (736.090, 690.060) (736.370, 690.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1798 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794
False : No Layer : M2 Bounds (728.780, 691.180) (729.770, 691.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1800 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_937
False : No Layer : M2 Bounds (736.750, 746.620) (737.030, 746.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1800 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 746.620) (736.370, 746.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 831.740) (763.430, 832.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1776
False : No Layer : M2 Bounds (761.170, 796.460) (761.450, 796.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1853 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147
False : No Layer : M2 Bounds (710.300, 802.060) (710.680, 802.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1855 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1193
False : No Layer : M2 Bounds (719.590, 826.700) (720.530, 826.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1855 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_904
False : No Layer : M2 Bounds (718.880, 831.740) (720.530, 832.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1857 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (697.810, 740.460) (698.090, 745.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1857 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6]
False : No Layer : M2 Bounds (697.150, 740.460) (697.430, 740.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1859 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862
False : No Layer : M2 Bounds (685.930, 730.380) (686.210, 730.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1859 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862
False : No Layer : M2 Bounds (687.250, 732.060) (687.530, 732.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1219
False : No Layer : M2 Bounds (685.930, 730.940) (686.210, 731.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1870
False : No Layer : M2 Bounds (685.930, 716.380) (686.210, 716.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1867 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1865
False : No Layer : M2 Bounds (675.370, 669.340) (675.650, 669.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1868 & Regular Wire of Net scan_clkI
False : No Layer : M2 Bounds (672.730, 650.860) (673.010, 651.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1870 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 680.540) (687.530, 680.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1870 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 716.380) (687.530, 716.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1873 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3092
False : No Layer : M2 Bounds (696.490, 771.820) (696.770, 772.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1885 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[3]
False : No Layer : M2 Bounds (718.880, 765.660) (719.260, 765.940)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 9
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1888 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6]
False : No Layer : M2 Bounds (720.910, 781.340) (721.190, 782.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1891 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1888
False : No Layer : M2 Bounds (728.830, 780.220) (729.110, 780.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1917 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_999
False : No Layer : M2 Bounds (693.850, 640.780) (694.130, 641.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1919 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[6]
False : No Layer : M2 Bounds (720.860, 776.300) (721.190, 776.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1919 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6]
False : No Layer : M2 Bounds (720.910, 775.740) (721.190, 776.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053
False : No Layer : M2 Bounds (686.590, 701.260) (687.530, 701.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1096
False : No Layer : M2 Bounds (686.540, 660.940) (687.530, 661.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1198
False : No Layer : M2 Bounds (736.700, 827.260) (737.080, 827.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 691.180) (687.530, 691.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1957 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060
False : No Layer : M2 Bounds (746.650, 654.780) (746.930, 660.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1961 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[0]
False : No Layer : M2 Bounds (710.350, 645.820) (710.630, 646.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1961 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 645.820) (709.310, 646.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1970 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1961
False : No Layer : M2 Bounds (709.640, 645.820) (710.020, 646.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1972 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_856
False : No Layer : M2 Bounds (720.250, 671.580) (720.530, 671.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1974 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[2]
False : No Layer : M2 Bounds (693.190, 651.420) (693.470, 651.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1975 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/FE_OFN9_n_868
False : No Layer : M2 Bounds (697.150, 644.700) (697.430, 644.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1975 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/FE_OFN9_n_868
False : No Layer : M2 Bounds (697.150, 651.420) (697.430, 651.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1976 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2003
False : No Layer : M2 Bounds (670.090, 711.900) (670.370, 712.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1979 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072
False : No Layer : M2 Bounds (686.590, 659.820) (686.870, 660.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1979 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 659.820) (687.530, 660.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1979 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063
False : No Layer : M2 Bounds (687.910, 659.820) (688.190, 660.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1986 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 696.220) (709.310, 696.500)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 10
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1988 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1870
False : No Layer : M2 Bounds (686.590, 680.540) (686.870, 680.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1988 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.200, 685.580) (687.580, 685.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1995 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1797
False : No Layer : M2 Bounds (738.070, 685.020) (738.350, 685.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1995 & Special Via of Net VDD
False : No Layer : M2 Bounds (744.010, 687.840) (744.290, 688.640)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1997 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1045
False : No Layer : M2 Bounds (720.250, 686.140) (720.530, 686.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1998 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1997
False : No Layer : M2 Bounds (720.910, 676.060) (721.190, 676.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2001 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1048
False : No Layer : M2 Bounds (711.670, 701.820) (711.950, 702.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2004 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1976
False : No Layer : M2 Bounds (670.700, 711.900) (671.030, 712.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2005 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053
False : No Layer : M2 Bounds (686.590, 705.740) (686.870, 706.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2005 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 705.740) (687.530, 706.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2017 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2108
False : No Layer : M2 Bounds (725.530, 805.980) (725.810, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2017 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9]
False : No Layer : M2 Bounds (726.190, 805.980) (726.520, 806.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2021 & Special Via of Net VDD
False : No Layer : M2 Bounds (694.510, 718.080) (694.790, 718.880)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2039 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1976
False : No Layer : M2 Bounds (670.040, 715.260) (671.030, 715.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2039 & Regular Wire of Net scan_clkI
False : No Layer : M2 Bounds (672.730, 741.580) (673.010, 741.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2049 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3076
False : No Layer : M2 Bounds (755.180, 730.940) (755.560, 731.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2061 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1238
False : No Layer : M2 Bounds (745.330, 724.780) (745.610, 725.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2061 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1288
False : No Layer : M2 Bounds (747.310, 752.780) (747.590, 761.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2061 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2098
False : No Layer : M2 Bounds (745.990, 761.740) (746.270, 762.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2067 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2038
False : No Layer : M2 Bounds (682.630, 741.020) (682.910, 741.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2079 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1172
False : No Layer : M2 Bounds (747.310, 781.340) (747.590, 782.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2085 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1193
False : No Layer : M2 Bounds (738.730, 802.620) (739.010, 802.900)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 11
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2085 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1891
False : No Layer : M2 Bounds (734.770, 795.900) (735.050, 796.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2085 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 795.900) (736.370, 796.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2087 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2103
False : No Layer : M2 Bounds (727.510, 812.140) (727.790, 812.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2094 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1183
False : No Layer : M2 Bounds (748.580, 781.340) (748.960, 781.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2097 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 772.380) (755.510, 772.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2098 & Special Via of Net VDD
False : No Layer : M2 Bounds (743.350, 768.480) (743.630, 769.280)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2103 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147
False : No Layer : M2 Bounds (709.030, 791.980) (709.310, 792.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2103 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1873
False : No Layer : M2 Bounds (709.690, 791.980) (709.970, 792.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2103 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[8]
False : No Layer : M2 Bounds (710.350, 791.980) (710.630, 792.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2116 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 826.700) (763.430, 826.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2116 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802
False : No Layer : M2 Bounds (761.830, 826.700) (762.110, 826.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2126 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933
False : No Layer : M2 Bounds (786.910, 816.060) (787.190, 816.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2126 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[12]
False : No Layer : M2 Bounds (773.050, 816.620) (773.330, 816.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2128 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1237
False : No Layer : M2 Bounds (766.450, 811.580) (766.730, 811.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2128 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933
False : No Layer : M2 Bounds (765.790, 807.100) (766.070, 807.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2163 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1286
False : No Layer : M2 Bounds (778.990, 807.100) (779.270, 807.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2163 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[11]
False : No Layer : M2 Bounds (779.650, 807.100) (779.930, 807.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2163 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[13]
False : No Layer : M2 Bounds (780.310, 807.100) (780.590, 807.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2180 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1299
False : No Layer : M2 Bounds (796.810, 821.660) (797.090, 823.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2180 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1727
False : No Layer : M2 Bounds (796.100, 821.660) (796.480, 821.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[14]
False : No Layer : M2 Bounds (811.990, 817.180) (812.270, 817.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[5]
False : No Layer : M2 Bounds (758.530, 639.100) (758.810, 639.380)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 12
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1137
False : No Layer : M2 Bounds (736.090, 676.060) (736.370, 676.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1162
False : No Layer : M2 Bounds (728.780, 705.180) (729.160, 705.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (687.250, 690.620) (687.530, 690.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946
False : No Layer : M2 Bounds (685.880, 690.620) (686.260, 690.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2019
False : No Layer : M2 Bounds (728.170, 741.020) (728.450, 741.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3065 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1972
False : No Layer : M2 Bounds (720.910, 664.860) (721.190, 665.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1891
False : No Layer : M2 Bounds (734.770, 827.260) (735.050, 827.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[9]
False : No Layer : M2 Bounds (740.050, 807.100) (740.330, 807.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3074 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2028
False : No Layer : M2 Bounds (748.630, 721.420) (748.910, 721.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3075 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1971
False : No Layer : M2 Bounds (711.670, 669.900) (711.950, 670.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3076 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[8]
False : No Layer : M2 Bounds (763.150, 725.900) (763.430, 726.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3083 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072
False : No Layer : M2 Bounds (681.970, 640.220) (682.250, 640.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3083 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (685.270, 654.780) (685.550, 658.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3083 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (685.270, 654.780) (685.600, 655.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3084 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (680.650, 664.860) (680.980, 665.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1869
False : No Layer : M2 Bounds (680.650, 680.540) (680.930, 680.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (681.310, 664.860) (681.590, 665.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3095 & Regular Wire of Net DTMF_INST/spi_clk
False : No Layer : M2 Bounds (770.410, 735.980) (770.690, 736.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_856 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1997
False : No Layer : M2 Bounds (720.200, 674.940) (720.580, 675.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_857 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794
False : No Layer : M2 Bounds (729.490, 665.420) (729.770, 665.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_857 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1794
False : No Layer : M2 Bounds (729.490, 685.020) (729.770, 685.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_861 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1089
False : No Layer : M2 Bounds (740.050, 706.300) (740.330, 706.580)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 13
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_861 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090
False : No Layer : M2 Bounds (739.390, 706.300) (739.670, 706.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_904 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1193
False : No Layer : M2 Bounds (719.590, 812.700) (719.870, 812.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1113
False : No Layer : M2 Bounds (746.650, 671.020) (747.590, 671.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1132
False : No Layer : M2 Bounds (755.180, 695.100) (755.560, 695.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1183
False : No Layer : M2 Bounds (746.650, 755.580) (746.980, 755.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1957
False : No Layer : M2 Bounds (746.650, 660.940) (746.930, 661.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060
False : No Layer : M2 Bounds (746.650, 640.780) (746.930, 641.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[2]
False : No Layer : M2 Bounds (747.310, 634.620) (747.590, 636.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1773
False : No Layer : M2 Bounds (763.150, 822.780) (763.480, 823.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[11]
False : No Layer : M2 Bounds (779.650, 805.980) (779.930, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_933 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[12]
False : No Layer : M2 Bounds (773.050, 826.140) (773.330, 826.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_935 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1359
False : No Layer : M2 Bounds (765.740, 790.860) (766.120, 791.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_935 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1782
False : No Layer : M2 Bounds (756.550, 776.300) (756.830, 776.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_937 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1186
False : No Layer : M2 Bounds (746.600, 751.660) (746.930, 751.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_942 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1789
False : No Layer : M2 Bounds (729.440, 694.540) (729.820, 694.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_978 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085
False : No Layer : M2 Bounds (745.940, 664.300) (746.320, 664.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_988 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085
False : No Layer : M2 Bounds (681.310, 636.300) (681.590, 636.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_999 & Special Via of Net VDD
False : No Layer : M2 Bounds (693.850, 637.440) (694.130, 638.240)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[4] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[1]
False : No Layer : M2 Bounds (753.250, 636.300) (753.530, 636.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[4] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[7]
False : No Layer : M2 Bounds (764.470, 660.380) (764.750, 660.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[7] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1995
False : No Layer : M2 Bounds (744.010, 683.900) (744.290, 684.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068
False : No Layer : M2 Bounds (739.390, 781.900) (739.670, 782.180)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 14
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1150
False : No Layer : M2 Bounds (737.410, 781.340) (737.690, 781.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0]
False : No Layer : M2 Bounds (736.090, 640.220) (736.370, 640.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[1]
False : No Layer : M2 Bounds (685.930, 654.780) (686.260, 655.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6]
False : No Layer : M2 Bounds (696.440, 735.420) (697.430, 735.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[2] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1917
False : No Layer : M2 Bounds (729.490, 635.180) (729.770, 635.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[10] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[10]
False : No Layer : M2 Bounds (783.610, 771.260) (783.890, 771.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[14] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[13]
False : No Layer : M2 Bounds (805.340, 801.500) (805.720, 801.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[15] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060
False : No Layer : M2 Bounds (818.590, 817.740) (818.870, 818.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[15] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[18]
False : No Layer : M2 Bounds (819.250, 817.740) (819.530, 818.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[16] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[15]
False : No Layer : M2 Bounds (819.910, 806.540) (820.190, 806.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[2] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060
False : No Layer : M2 Bounds (746.650, 636.300) (746.930, 636.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[6] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[4]
False : No Layer : M2 Bounds (754.570, 670.460) (754.850, 670.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060
False : No Layer : M2 Bounds (747.970, 757.260) (748.250, 757.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/dp & Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (827.780, 630.140) (828.160, 630.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[11]
False : No Layer : M2 Bounds (788.840, 705.180) (789.220, 705.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[12] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[14]
False : No Layer : M2 Bounds (767.110, 565.180) (767.390, 565.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[14] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[15]
False : No Layer : M2 Bounds (767.060, 560.140) (767.440, 560.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[6] & Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (772.390, 630.140) (772.670, 630.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[10] & Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (780.970, 766.220) (783.890, 766.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[11] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[13]
False : No Layer : M2 Bounds (780.310, 776.300) (780.590, 776.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[13]
False : No Layer : M2 Bounds (806.710, 795.900) (806.990, 796.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[14]
False : No Layer : M2 Bounds (837.070, 695.100) (838.060, 695.380)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 15
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[15] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[18]
False : No Layer : M2 Bounds (819.250, 776.300) (819.530, 776.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[3] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[3]
False : No Layer : M2 Bounds (779.650, 660.940) (779.930, 661.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[3] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[4]
False : No Layer : M2 Bounds (778.330, 650.860) (778.610, 651.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[18] & Regular Wire of Net scan_enI
False : No Layer : M2 Bounds (647.650, 734.860) (647.930, 735.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[0] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716
False : No Layer : M2 Bounds (720.250, 646.940) (720.530, 647.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[11] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1268
False : No Layer : M2 Bounds (731.470, 831.740) (731.750, 832.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[11] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1802
False : No Layer : M2 Bounds (761.830, 818.300) (762.110, 818.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[12] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[12]
False : No Layer : M2 Bounds (771.680, 831.740) (773.330, 832.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072
False : No Layer : M2 Bounds (686.590, 654.780) (686.870, 655.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1866
False : No Layer : M2 Bounds (674.050, 660.380) (674.330, 660.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_986
False : No Layer : M2 Bounds (703.700, 644.700) (704.080, 644.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[27] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1650
False : No Layer : M2 Bounds (840.370, 801.500) (840.700, 801.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[27] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (840.370, 791.420) (840.700, 791.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[2] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[1]
False : No Layer : M2 Bounds (710.350, 781.340) (710.630, 781.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[2] & Special Via of Net VDD
False : No Layer : M2 Bounds (693.190, 657.600) (693.470, 658.400)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[31] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1970
False : No Layer : M2 Bounds (709.690, 655.900) (709.970, 656.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[31] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[0]
False : No Layer : M2 Bounds (710.350, 645.260) (710.630, 645.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[31] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6]
False : No Layer : M2 Bounds (720.910, 761.740) (721.190, 762.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[3] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1026
False : No Layer : M2 Bounds (702.430, 691.740) (702.710, 692.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[3] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 711.340) (709.310, 711.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[4] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862
False : No Layer : M2 Bounds (685.930, 710.780) (686.210, 711.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[4] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942
False : No Layer : M2 Bounds (755.230, 655.900) (755.510, 656.180)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 16
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[5] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1070
False : No Layer : M2 Bounds (728.830, 755.580) (729.110, 755.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[5] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2019
False : No Layer : M2 Bounds (728.170, 744.940) (729.160, 745.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[7] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 755.580) (736.370, 755.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[7] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[7]
False : No Layer : M2 Bounds (703.750, 791.420) (704.030, 791.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[8] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1891
False : No Layer : M2 Bounds (734.770, 785.820) (735.050, 786.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[8] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 771.820) (736.370, 772.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2017
False : No Layer : M2 Bounds (728.170, 811.580) (728.450, 811.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2087
False : No Layer : M2 Bounds (726.850, 805.980) (727.130, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068
False : No Layer : M2 Bounds (739.390, 791.980) (739.670, 792.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068
False : No Layer : M2 Bounds (739.390, 802.620) (739.670, 802.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (736.090, 811.580) (736.420, 811.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[0] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907
False : No Layer : M2 Bounds (747.310, 664.860) (747.590, 665.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[10] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_935
False : No Layer : M2 Bounds (757.210, 785.820) (757.490, 786.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[10] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[11]
False : No Layer : M2 Bounds (788.230, 719.740) (788.510, 720.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[10] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[11]
False : No Layer : M2 Bounds (703.700, 821.660) (704.080, 821.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[11] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 816.620) (755.510, 816.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[14] & Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (782.950, 776.300) (783.230, 776.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[18] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[16]
False : No Layer : M2 Bounds (819.250, 806.540) (819.530, 806.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[1] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[31]
False : No Layer : M2 Bounds (709.030, 665.420) (709.310, 665.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[24] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1]
False : No Layer : M2 Bounds (840.370, 774.620) (840.650, 782.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[2] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946
False : No Layer : M2 Bounds (683.900, 664.860) (684.280, 665.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[2] & Regular Wire of Net scan_clkI
False : No Layer : M2 Bounds (672.730, 786.380) (673.010, 786.660)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 17
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[2] & Regular Wire of Net scan_clkI
False : No Layer : M2 Bounds (672.730, 789.740) (673.010, 790.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[3] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946
False : No Layer : M2 Bounds (686.540, 691.180) (686.920, 691.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[4] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053
False : No Layer : M2 Bounds (686.590, 711.340) (686.870, 711.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[5] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[9]
False : No Layer : M2 Bounds (697.810, 799.260) (698.090, 802.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2061
False : No Layer : M2 Bounds (747.310, 730.940) (747.590, 731.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[7]
False : No Layer : M2 Bounds (703.750, 786.380) (704.030, 786.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[9]
False : No Layer : M2 Bounds (697.100, 795.900) (697.480, 796.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[3]
False : No Layer : M2 Bounds (702.430, 805.980) (702.710, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[4]
False : No Layer : M2 Bounds (703.090, 805.980) (703.370, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_943
False : No Layer : M2 Bounds (755.230, 781.340) (755.510, 781.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[9]
False : No Layer : M2 Bounds (740.050, 802.060) (740.330, 802.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[0] & Regular Via of Net scan_enI
False : No Layer : M2 Bounds (646.940, 670.460) (647.320, 670.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[15] & Regular Via of Net scan_enI
False : No Layer : M2 Bounds (646.940, 725.900) (647.320, 726.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[16] & Regular Via of Net scan_enI
False : No Layer : M2 Bounds (646.940, 720.860) (647.320, 721.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[19] & Regular Wire of Net scan_enI
False : No Layer : M2 Bounds (654.250, 734.300) (654.530, 734.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[20] & Regular Via of Net scan_enI
False : No Layer : M2 Bounds (646.940, 741.020) (647.320, 741.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[21] & Regular Via of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (654.200, 751.100) (654.580, 751.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[24] & Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (667.450, 764.540) (667.730, 764.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[27] & Special Via of Net VDD
False : No Layer : M2 Bounds (691.870, 778.560) (692.150, 779.360)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[2] & Regular Via of Net scan_enI
False : No Layer : M2 Bounds (646.940, 680.540) (647.320, 680.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[5] & Regular Wire of Net scan_enI
False : No Layer : M2 Bounds (647.650, 700.700) (647.930, 700.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[8] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1861
False : No Layer : M2 Bounds (666.130, 693.980) (666.410, 694.260)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 18
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[9] & Regular Via of Net scan_enI
False : No Layer : M2 Bounds (646.940, 705.740) (647.320, 706.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/sel_op_a[1] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/sel_op_a[2]
False : No Layer : M2 Bounds (817.880, 644.700) (818.260, 644.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[10] & Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI
False : No Layer : M2 Bounds (781.580, 776.300) (781.960, 776.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[4] & Regular Wire of Net DTMF_INST/spi_clk
False : No Layer : M2 Bounds (770.410, 623.420) (770.690, 623.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[5] & Regular Wire of Net DTMF_INST/spi_clk
False : No Layer : M2 Bounds (770.410, 640.780) (770.690, 641.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[6] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[6]
False : No Layer : M2 Bounds (772.390, 655.340) (772.670, 655.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[6] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[6]
False : No Layer : M2 Bounds (772.390, 660.940) (772.670, 661.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[8] & Regular Wire of Net DTMF_INST/spi_clk
False : No Layer : M2 Bounds (770.410, 751.100) (770.690, 751.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[9] & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[14]
False : No Layer : M2 Bounds (782.950, 752.780) (783.230, 753.060)
Regular Via of Net DTMF_INST/clk & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (654.200, 500.800) (654.580, 501.080)
Regular Via of Net DTMF_INST/m_clk__L8_N0 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[10]
False : No Layer : M2 Bounds (788.890, 771.820) (789.170, 772.100)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[0]
False : No Layer : M2 Bounds (764.470, 630.700) (764.750, 630.980)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[11]
False : No Layer : M2 Bounds (777.010, 751.660) (777.290, 751.940)
Regular Via of Net DTMF_INST/spi_clk & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (654.200, 540.800) (654.580, 541.080)
Regular Via of Net ibiasI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (355.580, 540.540) (355.600, 541.080)
Regular Via of Net ibiasI & Special Wire of Net VSS
False : No Layer : M2 Bounds (355.220, 540.540) (355.270, 541.080)
Regular Via of Net pllrstI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (355.580, 380.800) (355.600, 381.220)
Regular Via of Net pllrstI & Special Wire of Net VSS
False : No Layer : M2 Bounds (355.220, 380.800) (355.270, 381.220)
Regular Via of Net refclkI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (355.580, 500.780) (355.600, 501.080)
Regular Via of Net refclkI & Special Wire of Net VSS
False : No Layer : M2 Bounds (355.220, 500.780) (355.270, 501.080)
Regular Via of Net vcomO & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (355.580, 420.700) (355.600, 421.080)
Regular Via of Net vcomO & Special Wire of Net VSS
False : No Layer : M2 Bounds (355.220, 420.700) (355.270, 421.080)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 19
Regular Via of Net vcopO & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M2 Bounds (355.580, 460.800) (355.600, 461.300)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pavss0
False : No Layer : M2 Bounds (234.490, 537.600) (234.770, 542.355)
Regular Wire of Net vcopO & Pin of Cell IOPADS_INST/Pavss0
False : No Layer : M2 Bounds (234.490, 542.955) (234.770, 572.245)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pavss0
False : No Layer : M2 Bounds (234.490, 572.845) (234.770, 577.600)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pibiasip
False : No Layer : M2 Bounds (234.490, 606.115) (234.770, 611.665)
Regular Wire of Net vcopO & Pin of Cell IOPADS_INST/Pibiasip
False : No Layer : M2 Bounds (234.490, 611.945) (234.770, 613.945)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pibiasip
False : No Layer : M2 Bounds (234.490, 614.225) (234.770, 646.115)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pvcomop
False : No Layer : M2 Bounds (234.490, 674.630) (234.770, 680.180)
Regular Wire of Net vcopO & Pin of Cell IOPADS_INST/Pvcomop
False : No Layer : M2 Bounds (234.490, 680.460) (234.770, 682.460)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pvcomop
False : No Layer : M2 Bounds (234.490, 682.740) (234.770, 714.630)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pvcopop
False : No Layer : M2 Bounds (234.490, 743.145) (234.770, 748.695)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pvss2
False : No Layer : M2 Bounds (234.490, 469.080) (234.770, 473.835)
Regular Wire of Net vcopO & Pin of Cell IOPADS_INST/Pvss2
False : No Layer : M2 Bounds (234.490, 474.435) (234.770, 503.725)
Regular Wire of Net vcopO & Blockage of Cell IOPADS_INST/Pvss2
False : No Layer : M2 Bounds (234.490, 504.325) (234.770, 509.080)
Regular Via of Net vcopO & Special Wire of Net VSS
False : No Layer : M2 Bounds (355.220, 460.800) (355.270, 461.300)
Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 762.860) (693.520, 763.140)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 770.700) (692.860, 770.980)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.980, 620.060) (746.280, 620.340)
Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.980, 643.020) (743.680, 643.300)
Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 629.580) (746.280, 629.860)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 609.980) (737.740, 610.260)
Regular Wire of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 606.060) (740.280, 606.340)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 20
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 625.100) (788.560, 625.380)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 670.460) (785.920, 670.740)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (786.200, 806.540) (787.240, 806.820)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 635.180) (788.560, 635.460)
Regular Via of Net DTMF_INST/FE_OFN0_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (839.000, 647.500) (840.040, 647.780)
Regular Via of Net DTMF_INST/FE_OFN5_scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 806.540) (842.680, 806.820)
Regular Wire of Net DTMF_INST/FE_OFN5_scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.680, 815.500) (840.040, 815.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/FE_OFN9_n_868 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 822.780) (741.700, 823.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/FE_OFN9_n_868 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.380, 792.540) (737.740, 792.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/FE_OFN9_n_868 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 772.380) (739.060, 772.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1020 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 644.140) (694.840, 644.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1023 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 634.620) (746.280, 634.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1032 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 660.380) (737.080, 660.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1033 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 677.740) (696.280, 678.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1033 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 676.620) (688.240, 676.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1042 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 640.780) (745.660, 641.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1042 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 663.740) (740.280, 664.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1045 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 688.380) (737.080, 688.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 701.820) (686.920, 702.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1053 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 715.260) (686.920, 715.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1056 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 677.180) (746.280, 677.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1056 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 676.620) (740.280, 676.900)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 21
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1057 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 694.540) (695.500, 694.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1063 & Special Wire of Net VDD
False : No Layer : M3 Bounds (694.460, 699.020) (694.840, 699.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1066 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.960, 660.940) (744.340, 661.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1066 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 678.860) (746.280, 679.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 640.780) (686.920, 641.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1072 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 657.580) (686.920, 657.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1073 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 711.900) (696.280, 712.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1089 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 700.700) (740.280, 700.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 714.700) (743.680, 714.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 704.620) (739.720, 704.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1090 & Special Wire of Net VSS
False : No Layer : M3 Bounds (739.340, 714.700) (740.280, 714.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1095 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 721.980) (694.180, 722.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1095 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 725.900) (687.580, 726.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1096 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 660.940) (686.260, 661.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1096 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 671.020) (686.260, 671.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1097 & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 685.580) (694.180, 685.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1097 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 714.140) (686.920, 714.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1097 & Special Wire of Net VSS
False : No Layer : M3 Bounds (686.540, 685.020) (688.240, 685.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1100 & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 741.580) (694.840, 741.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1100 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 731.500) (696.280, 731.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1100 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 728.140) (688.240, 728.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1103 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 702.380) (746.280, 702.660)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 22
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1116 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 757.820) (739.720, 758.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1135 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 745.500) (743.680, 745.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1135 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 734.860) (746.280, 735.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1135 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 745.500) (737.740, 745.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1135 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 732.060) (739.060, 732.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1135 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 742.140) (738.400, 742.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1137 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 715.260) (743.020, 715.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1137 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 676.620) (736.420, 676.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1137 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.040, 713.580) (737.740, 713.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1144 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.780, 751.660) (696.280, 751.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1147 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 777.420) (736.420, 777.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1150 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 785.260) (739.060, 785.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1151 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 771.260) (738.400, 771.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1162 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 734.300) (735.760, 734.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1167 & Special Wire of Net VDD
False : No Layer : M3 Bounds (694.460, 771.820) (694.840, 772.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1168 & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 711.900) (694.180, 712.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1170 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 797.580) (735.760, 797.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1173 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 805.980) (739.720, 806.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1186 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 771.260) (746.280, 771.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1187 & Special Wire of Net VDD
False : No Layer : M3 Bounds (742.640, 701.260) (743.020, 701.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1187 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 750.540) (746.280, 750.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1193 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 805.420) (739.060, 805.700)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 23
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1197 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 818.300) (746.280, 818.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1198 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 825.580) (737.740, 825.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1201 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 826.140) (735.760, 826.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1202 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 817.740) (744.340, 818.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1202 & Special Wire of Net VSS
False : No Layer : M3 Bounds (740.000, 817.740) (740.280, 818.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1213 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 707.420) (740.280, 707.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1218 & Special Wire of Net VSS
False : No Layer : M3 Bounds (686.540, 739.340) (687.580, 739.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1223 & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062
False : No Layer : M3 Bounds (757.160, 827.260) (757.540, 827.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1238 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 725.900) (746.280, 726.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1239 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.960, 724.220) (746.280, 724.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1245 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.880, 769.020) (688.240, 769.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1251 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 808.220) (787.900, 808.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1262 & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.180, 813.260) (790.280, 813.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1264 & Special Wire of Net VDD
False : No Layer : M3 Bounds (742.640, 777.980) (744.340, 778.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1264 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 786.380) (745.660, 786.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1264 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 747.180) (740.280, 747.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1283 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 812.140) (795.820, 812.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1286 & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 816.060) (788.560, 816.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1294 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 816.060) (745.660, 816.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1294 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 821.660) (745.660, 821.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1310 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907
False : No Layer : M3 Bounds (810.620, 816.060) (811.660, 816.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1334 & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 817.180) (787.900, 817.460)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 24
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1385 & Special Wire of Net VDD
False : No Layer : M3 Bounds (793.460, 831.740) (793.840, 832.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1385 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.780, 817.740) (795.820, 818.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1435 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.780, 826.700) (795.160, 826.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1435 & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 817.740) (790.280, 818.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1436 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 827.820) (796.280, 828.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1448 & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 830.620) (846.280, 830.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1650 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 798.140) (843.340, 798.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.980, 700.700) (743.680, 700.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 776.300) (743.680, 776.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 796.460) (746.280, 796.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 816.620) (796.280, 816.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 831.740) (843.340, 832.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1716 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 675.500) (737.740, 675.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1727 & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 821.660) (796.280, 821.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1727 & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.840, 819.420) (790.280, 819.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1738 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.940, 784.700) (746.280, 784.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1738 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 635.180) (735.760, 635.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1738 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 684.460) (740.280, 684.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1785 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 721.420) (743.680, 721.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1785 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 711.340) (737.740, 711.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1786 & Special Wire of Net VDD
False : No Layer : M3 Bounds (742.640, 719.740) (744.340, 720.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1786 & Special Wire of Net VDD
False : No Layer : M3 Bounds (742.640, 746.060) (744.340, 746.340)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 25
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1786 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 705.740) (740.280, 706.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1787 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 695.100) (743.020, 695.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1787 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 695.100) (740.280, 695.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1790 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 718.620) (736.420, 718.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1793 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 671.020) (696.280, 671.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1797 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 672.700) (738.400, 672.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1798 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 690.620) (735.760, 690.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1799 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 705.740) (737.740, 706.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1800 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 744.380) (737.080, 744.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1857 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 746.620) (696.280, 746.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1858 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 727.020) (692.860, 727.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1858 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 739.340) (694.180, 739.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1859 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 739.900) (696.160, 740.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1859 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 738.780) (688.240, 739.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1861 & Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[3]
False : No Layer : M3 Bounds (668.720, 700.140) (669.760, 700.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1862 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 706.860) (686.260, 707.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1863 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 771.260) (696.280, 771.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1863 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 728.700) (688.240, 728.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1869 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 671.580) (685.600, 671.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1870 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 674.380) (685.600, 674.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1915 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 643.580) (694.840, 643.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1917 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.140, 640.780) (694.840, 641.060)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 26
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1917 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 748.300) (786.580, 748.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1918 & Special Wire of Net VSS
False : No Layer : M3 Bounds (786.200, 752.220) (787.240, 752.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 685.020) (693.520, 685.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 731.500) (694.840, 731.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 651.980) (688.240, 652.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 685.580) (688.240, 685.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 718.620) (688.240, 718.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 648.060) (735.760, 648.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 776.300) (737.080, 776.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 824.460) (737.080, 824.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 807.100) (738.400, 807.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1944 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 646.380) (737.740, 646.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946 & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 704.620) (694.180, 704.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.140, 735.420) (694.180, 735.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.880, 690.620) (687.580, 690.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1946 & Special Wire of Net VSS
False : No Layer : M3 Bounds (688.520, 654.780) (689.560, 655.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1955 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 655.340) (740.280, 655.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1957 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 654.780) (746.280, 655.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1962 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 641.900) (696.280, 642.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1965 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 650.300) (686.260, 650.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1966 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 635.740) (693.520, 636.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1966 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.880, 637.420) (688.240, 637.700)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 27
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1968 & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 633.500) (694.840, 633.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1974 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 653.660) (694.840, 653.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1979 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 660.380) (686.260, 660.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1980 & Special Wire of Net VSS
False : No Layer : M3 Bounds (689.840, 652.540) (690.220, 652.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1984 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 667.100) (736.420, 667.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1994 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 666.540) (737.740, 666.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1995 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 685.020) (744.340, 685.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_1995 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 685.020) (740.280, 685.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2005 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 701.260) (686.260, 701.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2011 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 681.100) (745.660, 681.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2011 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.380, 682.780) (737.740, 683.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2020 & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 711.340) (693.520, 711.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2021 & Special Wire of Net VDD
False : No Layer : M3 Bounds (694.460, 712.460) (694.840, 712.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2029 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 713.020) (738.400, 713.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2051 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 760.620) (738.400, 760.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2052 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 752.220) (737.740, 752.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 715.820) (744.340, 716.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 751.660) (744.340, 751.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2062 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 732.060) (737.740, 732.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2062 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 723.660) (739.060, 723.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2066 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 749.980) (696.280, 750.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2066 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 750.540) (688.240, 750.820)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 28
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2071 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 773.500) (737.080, 773.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2071 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 789.740) (737.080, 790.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2071 & Special Wire of Net VSS
False : No Layer : M3 Bounds (739.340, 822.780) (740.280, 823.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2080 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 744.380) (746.280, 744.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2080 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 735.420) (740.280, 735.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2085 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 802.620) (739.060, 802.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2098 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 762.300) (746.280, 762.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2102 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 820.540) (735.760, 820.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2106 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 817.180) (746.280, 817.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2106 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 815.500) (740.280, 815.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2126 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 816.620) (787.240, 816.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2142 & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 811.580) (788.560, 811.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2161 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 823.340) (795.160, 823.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2161 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 830.060) (795.160, 830.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2162 & Special Wire of Net VDD
False : No Layer : M3 Bounds (792.800, 826.700) (793.840, 826.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2193 & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 827.260) (796.280, 827.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2194 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.480, 826.140) (793.180, 826.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_2194 & Special Wire of Net VSS
False : No Layer : M3 Bounds (789.500, 816.620) (790.280, 816.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 659.820) (746.280, 660.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060 & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 811.020) (796.280, 811.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3060 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 831.180) (836.080, 831.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 700.140) (742.360, 700.420)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 29
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.980, 776.860) (742.360, 777.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.940, 797.020) (746.280, 797.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 817.180) (796.280, 817.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 831.180) (842.020, 831.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3062 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 698.460) (737.740, 698.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 705.740) (694.840, 706.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Special Wire of Net VDD
False : No Layer : M3 Bounds (694.460, 735.980) (694.840, 736.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 665.420) (688.240, 665.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3063 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.860, 703.500) (688.240, 703.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 750.540) (843.340, 750.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 776.860) (737.740, 777.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 827.260) (737.740, 827.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 778.540) (739.720, 778.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3068 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 824.460) (739.720, 824.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3074 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.960, 720.300) (744.340, 720.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3083 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 641.900) (685.600, 642.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3083 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 658.140) (685.600, 658.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 668.780) (746.280, 669.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3085 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 671.020) (740.280, 671.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_3095 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.040, 670.460) (737.740, 670.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_861 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 701.820) (740.280, 702.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_862 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 725.340) (743.680, 725.620)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 30
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_862 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 726.460) (737.740, 726.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.780, 812.700) (796.280, 812.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_907 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 828.940) (836.080, 829.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_937 & Special Wire of Net VDD
False : No Layer : M3 Bounds (742.640, 771.820) (744.340, 772.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_937 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 751.660) (746.280, 751.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_937 & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 748.860) (737.740, 749.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_937 & Special Wire of Net VSS
False : No Layer : M3 Bounds (739.340, 752.220) (739.720, 752.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_940 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 720.860) (746.280, 721.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_940 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 724.780) (739.060, 725.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_940 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 720.860) (740.280, 721.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_942 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.980, 714.140) (743.680, 714.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_942 & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 691.180) (743.680, 691.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_942 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 694.540) (737.740, 694.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_973 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 654.780) (738.400, 655.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_974 & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 667.660) (740.280, 667.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_976 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 655.900) (743.020, 656.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_976 & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 656.460) (737.740, 656.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_978 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.940, 664.300) (746.280, 664.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_981 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 654.780) (742.360, 655.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_983 & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 656.460) (746.280, 656.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ALU_32_INST/n_993 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 634.060) (694.840, 634.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[10] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.780, 772.940) (796.280, 773.220)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 31
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.540, 775.180) (786.580, 775.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 794.780) (787.240, 795.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.180, 792.540) (790.280, 792.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[12] & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 791.980) (795.820, 792.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.540, 803.180) (787.240, 803.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 803.740) (789.880, 804.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 795.900) (836.740, 796.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.680, 803.180) (838.060, 803.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[16] & Special Wire of Net VSS
False : No Layer : M3 Bounds (839.000, 806.540) (840.040, 806.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[18] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 817.180) (838.720, 817.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[18] & Special Wire of Net VSS
False : No Layer : M3 Bounds (838.340, 809.340) (839.380, 809.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 655.340) (796.280, 655.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/acc[3] & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 644.700) (746.280, 644.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[7] & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.960, 683.900) (744.340, 684.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 769.580) (785.920, 769.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.540, 758.380) (787.240, 758.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/acc[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 754.460) (789.880, 754.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 691.180) (746.280, 691.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 634.060) (736.420, 634.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.380, 640.780) (736.420, 641.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.380, 644.700) (736.420, 644.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.380, 812.140) (735.760, 812.420)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 32
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 781.900) (739.720, 782.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (839.660, 791.980) (840.040, 792.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.320, 611.660) (743.680, 611.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 665.420) (745.660, 665.700)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 773.500) (843.340, 773.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 664.300) (685.600, 664.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 627.340) (737.740, 627.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 744.940) (736.420, 745.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.040, 811.020) (737.740, 811.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 644.140) (737.080, 644.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 831.740) (740.280, 832.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (739.340, 605.500) (739.720, 605.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 607.180) (736.420, 607.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (737.360, 642.460) (739.720, 642.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_cmd[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 636.300) (739.720, 636.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[13] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 810.460) (796.280, 810.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[13] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.840, 806.540) (790.280, 806.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[17] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 830.620) (838.060, 830.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[19] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 824.460) (846.280, 824.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[19] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.020, 816.620) (840.040, 816.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[3] & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 638.540) (746.280, 638.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (739.340, 620.060) (740.280, 620.340)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 33
Regular Via of Net DTMF_INST/TDSP_CORE_INST/alu_result[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.300, 659.260) (743.680, 659.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/alu_result[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 645.260) (746.280, 645.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/dmov_inc & Special Wire of Net VSS
False : No Layer : M3 Bounds (836.360, 550.060) (836.740, 550.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/dmov_inc & Special Wire of Net VSS
False : No Layer : M3 Bounds (836.360, 654.220) (836.740, 654.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/enc_go_port & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 639.660) (841.360, 639.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/gz & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 650.300) (846.280, 650.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[10] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 629.580) (842.020, 629.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 621.180) (835.420, 621.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 584.780) (842.680, 585.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 604.380) (842.020, 604.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 667.100) (844.000, 667.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.180, 589.820) (788.560, 590.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.840, 705.180) (790.280, 705.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 579.740) (836.740, 580.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[12] & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 664.860) (845.270, 665.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.840, 667.660) (789.220, 667.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 545.020) (835.420, 545.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[14] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[15]
False : No Layer : M3 Bounds (767.060, 560.140) (767.440, 560.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[14] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 612.780) (795.820, 613.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 618.380) (787.900, 618.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 645.260) (796.280, 645.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 614.460) (846.280, 614.740)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 34
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 573.580) (846.280, 573.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[8] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 674.940) (842.680, 675.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 620.060) (835.420, 620.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 660.940) (841.360, 661.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.640, 604.940) (842.680, 605.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 585.340) (844.000, 585.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/ir[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 640.220) (845.930, 640.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.680, 578.620) (838.720, 578.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/lez & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 634.060) (841.360, 634.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/lez & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 632.940) (836.740, 633.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/lz & Special Wire of Net VDD
False : No Layer : M3 Bounds (842.960, 635.180) (843.340, 635.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/lz & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 650.860) (846.280, 651.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 669.340) (796.280, 669.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 622.300) (796.280, 622.580)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[10] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.780, 716.380) (796.280, 716.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 781.900) (787.240, 782.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 716.380) (836.080, 716.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[11] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 761.180) (845.270, 761.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.180, 723.660) (788.560, 723.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 725.340) (836.740, 725.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 778.540) (790.280, 778.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 776.300) (836.740, 776.580)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 35
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 711.340) (846.280, 711.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 730.940) (846.280, 731.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 733.180) (835.420, 733.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 780.780) (835.420, 781.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[13] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.020, 708.540) (840.040, 708.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[14] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.780, 761.180) (795.820, 761.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[14] & Special Wire of Net VSS
False : No Layer : M3 Bounds (838.340, 728.700) (839.380, 728.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[15] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 761.740) (796.280, 762.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.180, 732.620) (790.280, 732.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 695.100) (836.080, 695.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 677.740) (836.740, 678.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 654.780) (796.280, 655.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 685.580) (836.740, 685.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.020, 680.540) (837.400, 680.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 670.460) (836.080, 670.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 683.340) (836.080, 683.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 746.060) (796.280, 746.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 671.020) (835.420, 671.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[5] & Special Wire of Net VDD
False : No Layer : M3 Bounds (844.280, 688.940) (845.270, 689.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[5] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 690.620) (835.420, 690.900)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[6] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 692.860) (836.080, 693.140)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mdr[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.700, 765.100) (836.080, 765.380)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 36
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mdr[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 720.860) (845.930, 721.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[10] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 706.300) (646.280, 706.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[12] & Special Wire of Net VDD
False : No Layer : M3 Bounds (591.280, 713.020) (592.540, 713.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (589.520, 713.020) (590.280, 713.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (639.020, 710.220) (639.400, 710.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.720, 730.380) (637.420, 730.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[16] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 725.900) (646.280, 726.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[17] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 721.420) (646.280, 721.700)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 670.460) (646.280, 670.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[21] & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.660, 742.140) (642.040, 742.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[21] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 741.020) (646.280, 741.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[28] & Special Wire of Net VSS
False : No Layer : M3 Bounds (688.520, 771.260) (690.220, 771.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[29] & Special Wire of Net VDD
False : No Layer : M3 Bounds (642.980, 769.580) (645.340, 769.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[30] & Special Wire of Net VSS
False : No Layer : M3 Bounds (688.520, 760.060) (690.280, 760.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[3] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 680.540) (646.280, 680.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 685.020) (646.280, 685.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[5] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.720, 691.180) (637.420, 691.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 701.260) (646.280, 701.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/mpy_result[7] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.720, 695.660) (637.420, 695.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (586.220, 704.620) (589.240, 704.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/mpy_result[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 699.580) (635.440, 699.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.040, 655.900) (737.740, 656.180)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 37
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 831.180) (737.740, 831.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 815.500) (737.740, 815.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 822.220) (739.060, 822.500)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[12] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 797.580) (788.560, 797.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 670.460) (693.520, 670.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.880, 655.900) (687.580, 656.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[27] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 800.380) (843.340, 800.660)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 663.180) (693.520, 663.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 659.260) (786.580, 659.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[31] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 751.100) (789.880, 751.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.880, 822.780) (687.580, 823.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 666.540) (786.580, 666.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.780, 704.620) (696.280, 704.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 695.660) (746.280, 695.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 710.780) (686.260, 711.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (686.540, 821.660) (686.920, 821.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 746.060) (696.280, 746.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 761.180) (696.280, 761.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 731.500) (746.280, 731.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[7] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 755.580) (739.060, 755.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[7] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.040, 741.580) (736.420, 741.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 771.260) (736.420, 771.540)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 38
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 785.820) (736.420, 786.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 758.940) (738.400, 759.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 781.340) (739.060, 781.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 789.740) (745.000, 790.020)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 811.580) (740.280, 811.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opa[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 791.980) (740.280, 792.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[0] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[1]
False : No Layer : M3 Bounds (668.720, 781.900) (669.100, 782.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (543.320, 737.100) (545.020, 737.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (538.700, 751.660) (539.080, 751.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 678.300) (787.900, 678.580)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.040, 816.060) (736.420, 816.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 784.140) (789.220, 784.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[15] & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 793.660) (694.840, 793.940)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[15] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 736.540) (792.520, 736.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 801.500) (687.580, 801.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 811.580) (687.580, 811.860)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 669.340) (694.840, 669.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (688.520, 658.140) (688.900, 658.420)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[24] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 782.460) (842.020, 782.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[27] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 799.820) (842.680, 800.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[27] & Special Wire of Net VDD
False : No Layer : M3 Bounds (842.300, 793.100) (842.680, 793.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[28] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.020, 770.140) (840.040, 770.420)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 39
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 676.620) (793.840, 676.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 785.820) (686.260, 786.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[30] & Special Wire of Net VSS
False : No Layer : M3 Bounds (789.500, 760.060) (790.280, 760.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[3] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 686.700) (793.840, 686.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 691.180) (686.920, 691.460)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (686.540, 795.900) (687.580, 796.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 705.180) (694.180, 705.460)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[4] & Special Wire of Net VDD
False : No Layer : M3 Bounds (743.960, 695.660) (744.340, 695.940)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 711.340) (686.920, 711.620)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.200, 796.460) (688.240, 796.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[5] & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 799.260) (696.280, 799.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[5] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 786.380) (685.600, 786.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.140, 745.500) (694.840, 745.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.140, 785.820) (696.280, 786.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 737.100) (694.840, 737.380)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 762.860) (696.160, 763.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[6] & Special Wire of Net VDD
False : No Layer : M3 Bounds (744.620, 730.940) (746.280, 731.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 816.620) (691.540, 816.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Special Wire of Net VDD
False : No Layer : M3 Bounds (694.460, 805.980) (694.840, 806.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.780, 818.860) (696.280, 819.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Special Wire of Net VSS
False : No Layer : M3 Bounds (688.520, 816.620) (690.280, 816.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[7] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 743.260) (737.740, 743.540)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 40
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[8] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.800, 822.220) (694.840, 822.500)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[8] & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 806.540) (696.280, 806.820)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[8] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 696.780) (795.820, 697.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (736.700, 781.900) (737.740, 782.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[8] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.680, 752.780) (740.280, 753.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (694.460, 826.140) (694.840, 826.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[9] & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.280, 791.980) (746.280, 792.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/opb[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (738.020, 811.020) (740.280, 811.300)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/opb[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (740.000, 802.060) (740.280, 802.340)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 671.020) (795.160, 671.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[10] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 715.260) (793.180, 715.540)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[11] & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 711.340) (642.040, 711.620)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[11] & Special Wire of Net VDD
False : No Layer : M3 Bounds (646.280, 714.140) (646.280, 714.420)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 708.540) (786.580, 708.820)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[13] & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 723.100) (641.380, 723.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[14] & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 724.780) (641.380, 725.060)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[14] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.720, 730.940) (638.740, 731.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[14] & Special Wire of Net VSS
False : No Layer : M3 Bounds (639.680, 724.780) (640.280, 725.060)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[20] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 745.500) (796.280, 745.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[27] & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 774.060) (691.540, 774.340)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[27] & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.820, 777.980) (692.860, 778.260)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[29] & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 763.980) (694.840, 764.260)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 41
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 673.820) (642.040, 674.100)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (646.280, 677.740) (646.280, 678.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[30] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 761.740) (787.900, 762.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[31] & Special Wire of Net VDD
False : No Layer : M3 Bounds (692.480, 753.900) (693.520, 754.180)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[31] & Special Wire of Net VDD
False : No Layer : M3 Bounds (693.140, 658.700) (696.280, 658.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[31] & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 658.700) (746.280, 658.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[31] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 658.700) (796.280, 658.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[31] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 658.700) (740.280, 658.980)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/p[31] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 658.700) (790.280, 658.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 688.380) (635.440, 688.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[4] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.720, 690.620) (638.740, 690.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[6] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 702.380) (635.440, 702.660)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/p[6] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.720, 698.460) (636.100, 698.740)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/phi_3 & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 548.940) (796.280, 549.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/phi_6 & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 499.100) (845.930, 499.380)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/phi_6 & Special Wire of Net VSS
False : No Layer : M3 Bounds (786.860, 519.260) (787.240, 519.540)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/phi_6 & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.180, 521.500) (790.280, 521.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_addrs_in[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 662.620) (842.680, 662.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/port_addrs_in[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (836.360, 660.940) (836.740, 661.220)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/port_addrs_in[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 714.700) (796.280, 714.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/port_addrs_in[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (843.620, 656.460) (844.660, 656.740)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (541.280, 339.500) (546.280, 339.780)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 42
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (591.280, 339.500) (596.280, 339.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 339.500) (646.280, 339.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 339.500) (696.280, 339.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (585.280, 339.500) (590.280, 339.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 339.500) (640.280, 339.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 339.500) (690.280, 339.780)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 623.980) (746.280, 624.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 623.980) (740.280, 624.260)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 618.940) (746.280, 619.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[2] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 618.940) (796.280, 619.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 618.940) (740.280, 619.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[2] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 618.940) (790.280, 619.220)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/port_data_in[3] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 410.620) (796.280, 410.900)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/sel_op_a[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.480, 633.500) (793.840, 633.780)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/sel_op_b[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (795.440, 664.860) (796.280, 665.140)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/sel_op_b[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (788.840, 627.900) (790.280, 628.180)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[0] & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.020, 643.580) (838.060, 643.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[10] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 775.740) (785.920, 776.020)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[11] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 783.580) (787.900, 783.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[12] & Special Wire of Net VDD
False : No Layer : M3 Bounds (796.100, 783.580) (796.280, 783.860)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[15] & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 785.820) (838.060, 786.100)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[1] & Special Wire of Net VDD
False : No Layer : M3 Bounds (794.120, 644.700) (795.820, 644.980)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 43
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[1] & Special Wire of Net VSS
False : No Layer : M3 Bounds (786.860, 643.020) (787.240, 643.300)
Regular Wire of Net DTMF_INST/TDSP_CORE_INST/top[3] & Special Wire of Net VSS
False : No Layer : M3 Bounds (787.520, 630.700) (789.880, 630.980)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/top[9] & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 766.220) (786.580, 766.500)
Regular Via of Net DTMF_INST/clk & Regular Wire of Net DTMF_INST/m_clk
False : No Layer : M3 Bounds (668.720, 500.780) (669.760, 501.060)
Regular Wire of Net DTMF_INST/m_clk__L1_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 338.940) (646.280, 339.220)
Regular Wire of Net DTMF_INST/m_clk__L1_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 338.940) (640.280, 339.220)
Regular Wire of Net DTMF_INST/m_clk__L2_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 340.060) (646.280, 340.340)
Regular Wire of Net DTMF_INST/m_clk__L2_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 340.060) (640.280, 340.340)
Regular Wire of Net DTMF_INST/m_clk__L4_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 340.060) (696.280, 340.340)
Regular Wire of Net DTMF_INST/m_clk__L4_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 340.060) (746.280, 340.340)
Regular Via of Net DTMF_INST/m_clk__L4_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (745.940, 428.540) (746.280, 428.820)
Regular Wire of Net DTMF_INST/m_clk__L4_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 340.060) (690.280, 340.340)
Regular Wire of Net DTMF_INST/m_clk__L4_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 340.060) (740.280, 340.340)
Regular Wire of Net DTMF_INST/m_clk__L5_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 430.780) (696.280, 431.060)
Regular Wire of Net DTMF_INST/m_clk__L5_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 430.780) (746.280, 431.060)
Regular Via of Net DTMF_INST/m_clk__L5_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (686.540, 496.860) (688.240, 497.140)
Regular Via of Net DTMF_INST/m_clk__L5_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.860, 430.780) (690.280, 431.060)
Regular Wire of Net DTMF_INST/m_clk__L5_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 430.780) (740.280, 431.060)
Regular Via of Net DTMF_INST/m_clk__L6_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (687.860, 499.660) (689.560, 499.940)
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (695.120, 497.980) (696.280, 498.260)
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 478.940) (746.280, 479.220)
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 478.940) (796.280, 479.220)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 44
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 478.940) (846.280, 479.220)
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 478.940) (740.280, 479.220)
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 478.940) (790.280, 479.220)
Regular Wire of Net DTMF_INST/m_clk__L7_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 478.940) (840.280, 479.220)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 783.020) (696.280, 783.300)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 783.020) (746.280, 783.300)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 795.900) (791.860, 796.180)
Regular Via of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.480, 802.060) (791.860, 802.340)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.480, 804.860) (796.280, 805.140)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 804.860) (846.280, 805.140)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 783.020) (690.280, 783.300)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 783.020) (740.280, 783.300)
Regular Via of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 771.820) (789.220, 772.100)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 795.900) (790.280, 796.180)
Regular Wire of Net DTMF_INST/m_clk__L8_N0 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 804.860) (840.280, 805.140)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 684.460) (646.280, 684.740)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 699.020) (642.040, 699.300)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.280, 731.500) (646.280, 731.780)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.660, 695.100) (646.280, 695.380)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (642.320, 691.180) (642.700, 691.460)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 754.460) (696.280, 754.740)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 754.460) (746.280, 754.740)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 45
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 634.060) (796.280, 634.340)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (792.800, 640.780) (793.180, 641.060)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 649.740) (846.280, 650.020)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 677.740) (635.440, 678.020)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 684.460) (640.280, 684.740)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 711.900) (635.440, 712.180)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 721.420) (635.440, 721.700)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 725.340) (635.440, 725.620)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 731.500) (640.280, 731.780)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 754.460) (690.280, 754.740)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 761.740) (687.580, 762.020)
Regular Via of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (686.540, 763.980) (687.580, 764.260)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 754.460) (740.280, 754.740)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 634.060) (790.280, 634.340)
Regular Wire of Net DTMF_INST/m_clk__L8_N1 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 649.740) (840.280, 650.020)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 610.540) (746.280, 610.820)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VDD
False : No Layer : M3 Bounds (791.280, 622.860) (796.280, 623.140)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 493.500) (846.280, 493.780)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VDD
False : No Layer : M3 Bounds (841.280, 622.860) (846.280, 623.140)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 610.540) (740.280, 610.820)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VSS
False : No Layer : M3 Bounds (785.280, 622.860) (790.280, 623.140)
Regular Via of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 490.140) (840.040, 490.420)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 46
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VSS
False : No Layer : M3 Bounds (835.280, 622.860) (840.280, 623.140)
Regular Via of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.680, 484.540) (840.040, 484.820)
Regular Wire of Net DTMF_INST/m_clk__L8_N2 & Special Wire of Net VSS
False : No Layer : M3 Bounds (839.000, 493.500) (840.280, 493.780)
Regular Wire of Net DTMF_INST/spi_clk & Special Wire of Net VDD
False : No Layer : M3 Bounds (691.280, 541.100) (696.280, 541.380)
Regular Wire of Net DTMF_INST/spi_clk & Special Wire of Net VDD
False : No Layer : M3 Bounds (741.280, 541.100) (746.280, 541.380)
Regular Wire of Net DTMF_INST/spi_clk & Special Wire of Net VSS
False : No Layer : M3 Bounds (685.280, 541.100) (690.280, 541.380)
Regular Wire of Net DTMF_INST/spi_clk & Special Wire of Net VSS
False : No Layer : M3 Bounds (735.280, 541.100) (740.280, 541.380)
Regular Via of Net ibiasI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M3 Bounds (355.580, 540.540) (355.600, 540.820)
Regular Via of Net pllrstI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M3 Bounds (355.580, 380.940) (355.600, 381.220)
Regular Via of Net refclkI & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M3 Bounds (355.580, 500.780) (355.600, 501.060)
Regular Via of Net scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (641.660, 710.780) (642.040, 711.060)
Regular Wire of Net scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 708.540) (646.280, 708.820)
Regular Wire of Net scan_enI & Special Wire of Net VDD
False : No Layer : M3 Bounds (645.620, 729.260) (646.280, 729.540)
Regular Via of Net scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (635.280, 678.860) (635.440, 679.140)
Regular Wire of Net scan_enI & Special Wire of Net VSS
False : No Layer : M3 Bounds (837.680, 490.700) (838.720, 490.980)
Regular Via of Net vcomO & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M3 Bounds (355.580, 420.700) (355.600, 420.980)
Regular Via of Net vcopO & Blockage of Cell DTMF_INST/PLLCLK_INST
False : No Layer : M3 Bounds (355.580, 461.020) (355.600, 461.300)
Regular Via of Net ibiasI & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.900, 540.540) (354.280, 540.820)
Regular Via of Net ibiasI & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.900, 541.660) (354.280, 541.940)
Regular Wire of Net ibiasI & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.950, 540.540) (354.230, 541.940)
Regular Via of Net pllrstI & Special Wire of Net VDD
False : No Layer : M4 Bounds (354.560, 380.940) (354.940, 381.220)
Regular Via of Net pllrstI & Special Wire of Net VDD
False : No Layer : M4 Bounds (354.560, 385.420) (354.940, 385.700)
*********** SOC ENCOUNTER Violation Browser Report **********
Report File Name : DTMF_CHIP.viols.rpt Page : 47
Regular Wire of Net pllrstI & Special Wire of Net VDD
False : No Layer : M4 Bounds (354.610, 380.940) (354.890, 385.700)
Regular Via of Net refclkI & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.900, 500.780) (354.280, 501.060)
Regular Via of Net refclkI & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.900, 501.340) (354.280, 501.620)
Regular Wire of Net refclkI & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.950, 500.780) (354.230, 501.620)
Regular Via of Net vcomO & Special Wire of Net VDD
False : No Layer : M4 Bounds (352.580, 420.700) (352.960, 420.980)
Regular Via of Net vcopO & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.240, 458.220) (353.620, 458.500)
Regular Via of Net vcopO & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.240, 461.020) (353.620, 461.300)
Regular Wire of Net vcopO & Special Wire of Net VDD
False : No Layer : M4 Bounds (353.290, 458.220) (353.570, 461.300)
Regular Via of Net scan_enI & Blockage of Cell IOPADS_INST/Pscanenip
False : No Layer : M5 Bounds (234.390, 340.150) (234.870, 340.390)
Regular Wire of Net scan_enI & Blockage of Cell IOPADS_INST/Pscanenip
False : No Layer : M5 Bounds (234.490, 340.150) (235.000, 340.340)
Regular Via of Net scan_enI & Blockage of Cell IOPADS_INST/Pscanenip
False : No Layer : M6 Bounds (234.360, 340.330) (234.900, 340.470)
Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[14] & Regular Via of Net DTMF_INST/TDSP_CORE_INST/ir[15]
False : No Layer : Via23 Bounds (767.120, 560.150) (767.380, 560.410)
Regular Via of Net ibiasI & Blockage of Cell IOPADS_INST/Pibiasip
False : No Layer : Via56 Bounds (234.520, 612.740) (234.810, 613.100)
Regular Via of Net refclkI & Blockage of Cell IOPADS_INST/Prefclkip
False : No Layer : Via56 Bounds (234.520, 818.260) (234.810, 818.620)
Regular Via of Net scan_clkI & Blockage of Cell IOPADS_INST/Pscanckip
False : No Layer : Via56 Bounds (234.520, 271.140) (234.810, 271.150)
Regular Via of Net test_modeI & Blockage of Cell IOPADS_INST/Ptestmdip
False : No Layer : Via56 Bounds (234.520, 407.220) (234.810, 407.580)
Regular Via of Net vcomO & Blockage of Cell IOPADS_INST/Pvcomop
False : No Layer : Via56 Bounds (234.520, 680.660) (234.810, 680.860)
Regular Via of Net vcopO & Blockage of Cell IOPADS_INST/Pvcopop
False : No Layer : Via56 Bounds (234.520, 749.940) (234.810, 750.300)