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Need help to better understand the role of the integrator

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Sebastie

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Hello
I would want to understand the integrator function on this schematic :


What is the aim of it instead of a simple inverter circuit ?

I tried to calculate the expression of the integrator stage in Laplace :
Vs(s)=V2(s)+(V2(s)-V1(s))*1/(R4*C3*s)

Does it correct ? I tried to deduce the expression of Vs(t) but I didn't success... could you please help me to find it ?

thanks for you help !
 

I think V2 and V1 are same node. R4 /C3 make the integrator (low pass filter) and give the average voltage at the output.
LT3015 is a linear regulator , uses Vout of integrator as reference and produces the low load resistance, Fixed output voltage.
 

When you connect two regulators in parallel each of them should supply exactly the same current of the other one, otherwise one of the two will sink some current (i.e. will flow back from output to input). Supposing the leakage current is the same for both the regulators then you can know the output current measuring the input current. The OpAmp (error amplifier) input levels will depends from the currents: V1 = Vcc - R1*I1 and V2 = Vcc - R2*I2. Since R1 = R2 the OpAmp will keep I1 = I2 acting on the Vref, that is changing the output voltage of the lower LT3015. The C3 capacitor will average the error avoiding fast oscillations due to load variations.
 
Hello thanks for your replies.
Ok, the integrator permit to have the average of the variation between V1 and V2 and correct it.
I tried to to evaluate the output and I have this :
**broken link removed**

I don't see the relationship beetwen the theorical result and the simulation

When there are two identical voltage on inputs, the output of the op amp saturates...

**broken link removed**

If I put a variation on one of the input, the variation is amplified by the op amp but the output is still at the maximum...
In fact I thought that the stage would only integrate the voltage difference, but it doesn't seem to be the case... what does this output waveform could help to regulate the difference between the two regulator inputs ?

**broken link removed**

Thanks for your help
 

The problem with your simulation is that V3 and V4 are fixed voltages that are not changed by a feedback from the opamp. V3 must be a source dependent from the OpAmp output so that the circuit can converge.
 

I guess, the result you are getting is the expected result. Capacitor charges to maximum saturation voltage of OPAMP. I don't understand where you see problem.
 

Hello,
Thanks for your help,
You're right albbg, I forgot that I have to consider the loop and not only the integrator stage...
but on the relation that I have found, if I consider the first case with V1 and V2 which are exactly same, if my theorical expression is correct, we will have Vs(t)=V1(t) (because the term in the integration is equal to 0) so a constant term... I may do a mistake ... could you help to rely the relationship and the simulation result ?

thanks for all
 

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