Need help in verifying floating point unit

[seeker_123]

Hi ....
I have implemented double precision floating point adder, subtractor, multiplier, division and square root. For verification initially I have checked with small number of test cases. For this i have manually calculated expected result and check with my design output.
Now to verify in detail I have randomly generated thousands of cases. As I can not calculate expected result for those many cases I stucked here.
How can I get expected result? Is there any design with which I can compare my result...?
I am following IEEE 754 2008 standard completely.

if anyone can guide me then please help me in this................


Thanks in advance ...........................

 

[TrickyDicky]

xilinx and altera provide floating point IP cores. try using them?
or just get matlab to generate the expected results.

 

[seeker_123]

xilinx and altera provide floating point IP cores. try using them?
or just get matlab to generate the expected results.

Thanks......
I have compared my result with xilinx ip core. But xilinx ip core also doesn't support fully to IEEE 754 standard like
1. it doesn't consider denormal number at input side.
2. it consider only one rounding mode (round to nearest ties to even).
same limitation with altera ip core.

whatever feature xilinx IP core support I have checked that with my design and its working very well.
But my design considers denormal numbers at input side and other 4 rounding mode mentioned in IEEE 754 standard
I am not getting how to verify these conditions....
So here I got stucked........

So please guide me in this.....



- - - Updated - - -

just get matlab to generate the expected results.

How can I take help from matlab for this....
I have tried with matlab earlier but couldn't get right way.
Can you please elaborate something in this ..

thanks again.....