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Need help in SPI......

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LF_LF

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Good evening to all. I face the same case as pradeepkumar481 that posted on 18/11. I am using the ADS7861 (a quite new ADC that somemore u can request from Texas Instrument) and need to connect to FPGA DE2 board. I have been told to use a SPI on this. However, i have no idea what is the SPI and how to connect it. SPI is a synchronous interface fro serial communication according to wikipedia. Is that a chip??? Since it consists of Master and slave structure, is that i need to use VHDL code inside my FPGA board and a chip between ADC and FPGA (if SPI is really a chip). then FPGA acts as a master and the chip between FPGA and ADC acts as a slave. Is it? I really cant figure it out as ADC cant be input the VHDL code.

For another assumption of mine, is that i just need to input both master ans slave VHDL code inde FPGA board . Then the FPGA acts as Master and connect to slave which is inside FPGA too. Then the slve is connected to ADC, which is ADS7861 in my case. Is it?

I need to design the VHDL code for these in order to connect ADC and FPGA. I cant process as i struck here. Can somebody help me?
 

btbass

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SPI is quite a simple synchronous serial interface in which you have one master and several slaves. There is a clock line and a data line. The slaves have a data in and a data out. The slaves are connected in series. The data out line from one slave connects to the data in line of the next. The clock line is common to all slaves.
The master generates the clock and outputs the data. There are various protocols and data rates. You will have to look at the data sheet of the adc to see which one it uses. Data can change on a high clock cycle, then be latched in on the low transition or vice versa.
The data is clocked through the slaves. So, if you had three slaves to program, you would transmit three bytes, the first byte would end up in the last slave in the chain, the second byte in the second slave and the third byte in the first.

You feed back the data out from the last slave to the data in of the master.
You would have to consult the data sheet to understand the protocol, but to read data from the slave, you normally send a register address to the slave. Then send eight clock cycles to clock the data from the slave to the data in of the master.
 

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