Need help for bias circuit 2 stage broadband LNA using ATF34143 in ads

[rajesh navagare]

i have done small signal analysis for 2 stage amplifier using ATF34143 for 4V,40 mA for Vgs=-0.41 but i am new in this so i need help for gate bias and drain bias
i did already but i get harmonic distortion and low power added efficiency.

i want to know what should be Vgg if Vgs is found -0.41 V. does Rs required or inductor is enough in gate bias.
i have posted my results of small signal analysis and design without bias circuit

 

[vfone]

ATF34143 is an LNA (Low Noise Amplifier), and by definition any LNA should work in Class-A.
So, good PAE (Power Added Efficiency) is not the main target of performances of this transistor.
For best performances follow the Avago application notes 1190 and 1191.

 

[rajesh navagare]

it was helpful but can you tell me, with this result can i design amplifier and if yes then how should i bias to achieve 4V 40 mA Q-point.. what should be my next step

 

[rajesh navagare]

Do i need to provide parallel tuned L C circuit for drain ? what should be value of Rg ?