kaima_ko
Newbie level 6
baudrate analysis
Hi all,
I am having a problem with getting my kit (LPC2364 - ARM7 TDMI-S, 57.6 MHz) running at baudrate 115200. It works at 115200, actually. But the communication is broken as soon as some other tiny software modules are enabled and take some CPU cycles away. It's natural and I have no wonder about it. But I would like to have a numeric timing analysis and I would like to know if what I am thinking is correct:
The ARM does an average 1 instruction per cycle ~ (1/57.6) * 10^-6 ~ 17.36 ns
The baudrate 115200 ships out 1 character (10bit) in (1/11520) ~ 868 ns
--> While 1 char is comming (from PC), my ARM can process 868/17.36 ~ 48 instructions
Assume that PC sends out data continously without delay between chars, then my ARM would hardly handles the communication if it has to do more than 48 instructions between chances to get back to work on the serial port, right?
Any comments?
Hi all,
I am having a problem with getting my kit (LPC2364 - ARM7 TDMI-S, 57.6 MHz) running at baudrate 115200. It works at 115200, actually. But the communication is broken as soon as some other tiny software modules are enabled and take some CPU cycles away. It's natural and I have no wonder about it. But I would like to have a numeric timing analysis and I would like to know if what I am thinking is correct:
The ARM does an average 1 instruction per cycle ~ (1/57.6) * 10^-6 ~ 17.36 ns
The baudrate 115200 ships out 1 character (10bit) in (1/11520) ~ 868 ns
--> While 1 char is comming (from PC), my ARM can process 868/17.36 ~ 48 instructions
Assume that PC sends out data continously without delay between chars, then my ARM would hardly handles the communication if it has to do more than 48 instructions between chances to get back to work on the serial port, right?
Any comments?