need files for layout drawing (for TSMC 0.18um)

[Snik]

Layout problem

hi dear all friends;
i have designed an ADC in 0.18u(TSMC). Now i must draw its layout with cadence or Ledit but unfortunately i haven't any experience about this issue. in order to design ADC in Hspice, i used of technology file with .lib suffix. Now what kind of library i should use for layout drawing? i would be appropriated if anybody give me required files for layout drawing (for TSMC 0.18um).

my email is: godymor(at)yahoo.com
Thx in advance

 

[Colbhaidh]

Re: Layout problem

You must have the TSMC 0.18um PDK which has all the layouts for the P-Cells (individual transistors, resistors etc). If you try to build the layouts from scratch then the models will not be correct and your simulations be be wrong.

 

[Snik]

Layout problem

Dear Colbhaidh, Thx for your reply.
i would be appriciated if you send these files for my or give me a link for download it. i'm living in a country which has no any access to these technologies but unfortunatly my professor forced me to draw a layout for graduation(MSC). i haven't so time and i have to finish it at most till next month.

Thx in advance

 

[Colbhaidh]

Re: Layout problem

I do not have the TSMC PDK as TSMC would not be my first choice foundry.
There is an Open Standard Cell Library at h@@p://www.vlsitechnology.org/
This is not exactly what you need but there is a variety of GDS layouts which can be sized to any technology and you can extract the components or use them as guides.
If you cannot get what you want from here then ask again but with more details on your ADC design.