rameshbalan
Member level 2
- Joined
- Jan 11, 2012
- Messages
- 44
- Helped
- 1
- Reputation
- 2
- Reaction score
- 1
- Trophy points
- 1,288
- Activity points
- 1,563
i create one code for nco in modelsim. this works correctly. but while simulating in Quartus it is not works i dont know why.
code is,
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use ieee.math_real.all;
entity ncocode is
GENERIC (amp_res : INTEGER := 8; -- output amplitude resolution
phas_res : INTEGER := 12; -- phase resolution
acc_size:INTEGER:=32 --accumulater size
);
port(fcw : in std_logic_vector(phas_res-1 downto 0);
clk: in std_logic;
opval : out std_logic_vector(amp_res-1 downto 0));
end ncocode;
architecture behav of ncocode is
constant romsize:integer:=2**phas_res-1;
constant romwidth:integer:=2**(amp_res-1)-1;
constant wavesize:integer:=2**(phas_res-1);
constant beta : integer := integer(((2**amp_res)-1)/2);
signal temp : std_logic_vector(phas_res-1 downto 0):="000000000000";
signal romvar : std_logic_vector(amp_res-1 downto 0);
begin
process(clk)
VARIABLE x: REAL;
begin
if rising_edge(clk) then
temp<= temp + fcw;
x:= (SIN(real(conv_integer(temp))*MATH_PI/real(wavesize)));
romvar<=STD_LOGIC_VECTOR(CONV_SIGNED(INTEGER(x*real(beta))-(1/2),amp_res));
end if;
end process;
opval <= romvar;
end behav;
--------------------------------------------------------------------------
please tell immediately.
code is,
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use ieee.math_real.all;
entity ncocode is
GENERIC (amp_res : INTEGER := 8; -- output amplitude resolution
phas_res : INTEGER := 12; -- phase resolution
acc_size:INTEGER:=32 --accumulater size
);
port(fcw : in std_logic_vector(phas_res-1 downto 0);
clk: in std_logic;
opval : out std_logic_vector(amp_res-1 downto 0));
end ncocode;
architecture behav of ncocode is
constant romsize:integer:=2**phas_res-1;
constant romwidth:integer:=2**(amp_res-1)-1;
constant wavesize:integer:=2**(phas_res-1);
constant beta : integer := integer(((2**amp_res)-1)/2);
signal temp : std_logic_vector(phas_res-1 downto 0):="000000000000";
signal romvar : std_logic_vector(amp_res-1 downto 0);
begin
process(clk)
VARIABLE x: REAL;
begin
if rising_edge(clk) then
temp<= temp + fcw;
x:= (SIN(real(conv_integer(temp))*MATH_PI/real(wavesize)));
romvar<=STD_LOGIC_VECTOR(CONV_SIGNED(INTEGER(x*real(beta))-(1/2),amp_res));
end if;
end process;
opval <= romvar;
end behav;
--------------------------------------------------------------------------
please tell immediately.