The "native" transistor sits in unmodified P-epi
(or P-bulk, if you're that cheap) and has the
lowest practical VT.
Low-VT will have an explicit P implant, regular
and high VT will either substitute or "stack" for
higher active area doping. Unless there's only
two VT options in which case "low VT" might be
"native" if the gate work function and the "native"
starting material doping work out to some
moderate positive (for NMOS) VT.
You could look at the specific process flow's
mask Booleans to figure out the real construction.