Multiply and Accumulate Architectures for FIR and IIR filters

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Naveed Ahmed

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Hi All,

Has anyone done the survey on MAC architectures for digital filters in terms of performance, power consumption, less chip area? I want the details that how much work has been done on it. If yes , can you please provide the details/report of that?

Thanks alot,

Regards,
Naveed
 

Current Processors can compute 1 output per cycle for a 10 tap FIR filter, may take 3-4 cycles per 1 output for a 10 tap IIR filter.
Hope that helps........
 

Thanks for the reply chitturi,

Can you give the name/number of the processor which you are referring to (10 point FIR in 1 cycle , 10 point IIR in 3-4 cycles). If you have some documents on survey on it , can you provide the documents too?

Thanks & Regards,
Naveed
 

chitturi,

Thanks chitturi; The link mentioned by you is good which has assembly optimized libraries for FIR,IIR & FFT. But it doesnt have FIR,IIR in hardware

Regards,
Naveed
 

Hi Naveed,

I miss-understood your question. Thought you r looking for software based FIR/IIR.
I do not know much on the hardware implementations of it.

-suresh
 

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