Multiplier and Accumulator in Verilog

[atinjain]

I'm trying to implement MAC in verilog. For multiplication part I'm using Booth Algorithm. I've made a separate module for the multiplication part booth_mul.v (lets say).

Now what I want to do is to add the products generated subsequently. For this I intended to call this(booth_mul) module inside the always block. But that gives an error and on google search I found that perhaps a module cannot be called or instantiated inside the always block.

Help Please? What should I do? Is there a way around?

 

[viveks2585]

Hi,

You cannot call a file inside always block. Please understand what does always block does. If you want the same functionality then instantiate it assign the output of booth_mul signal to ber used in the always block. By this means you can manipulate

Thanks,
Vivek.S