multiple vdds and grounds

[John Xu]

Hi,
i have a question on the vdd and grounds in a chip. I noticed in lot of pruduts(chips), there are multiple vdd and grounds in one chip. I did not mean the different vdds/grounds for analog and digital part, respectively. I mean there are multiple vdd/ground for just analog part, multiple vdd/ground for digital part.

As I know, there are the concerns such as low-freq vdd, high-freq vdd, and other concerns for vdd and ground route easily in layout, etc..

Would anyone tell me any other considerations behind it?
Thanks in advance

 

[IanP]

All the components are given their power supply from Vdd and GND lines. You may observe in the pin configuration of chips that there are several Vdd and Gnd pins. This is done for the better power handling of the chip.

There are signals in the chip like the precharge signal, which when asserted, all the lines draw a lot of current. This can lead to a "Voltage droop" and a "Ground Bounce". This can harm the logical immunity of the chip as well as other circuits, if it is not decoupled properly. The multiple Vdd and Gnd pins help to reduce this harmful phenomenon.

As you can see the above quotation gives you another reason for having multiple Vdd and GND pins ..
Regards,
IanP

 

[hr_rezaee]

hi
we have multiple supplies because :
1) we want vdd and gnd of analog circuit be frag from vdd and gnd of digital ( because digital make some spike and glitch in supply.
2) if we have multiple supplies, we have less noise (substrate in chip have less noise)

 

[jordan76]

Hi Ianp,

I have another question: if the process is p-sub Nwell cmos process, the chip has both 1.8V and 2.5V power supply for analog parts, should the analog ground for 1.8V be separated that for 2.5V? What about the connections between digital ground and analog ground? Why?

Thanks in advance!

regards,
jordan76