Multiple i2c slave access

[mush]

Hello all,

the I2C protocol can be implemented by any I/O in a FPGA right? My question is: if I have 3 different I2C slaves what is the beeter solution, to implement 3 different I2C or use an I2C switch to select the appropriate I2C slave each time? What is the difference? Use less logic and pins in the FPGA in the switch choice?

Regards,

Mush

 

[ads-ee]

Why don't you just connect all of them to the one I2C directly? That's why slave devices have addresses.

Regards

 

[mush]

Why don't you just connect all of them to the one I2C directly? That's why slave devices have addresses.

Regards

Well, that is a good question!!You are right, I was carried away from the AC701 design of Xilinx. Why they did't use the same logic? page 6

 

[ads-ee]

I'd say they were just being overly conservative in the I2C design. Nothing wrong with that if you don't want to have to analyze the PCB layout to make sure the signal integrity is good.

Regards

 

[hardware_guy]

Why they did't use the same logic? page 6

Hello.
I think they made so, because FPGA don't have enough current on IO pins, to pull down so much I2C devices at ones.
In your project, 3 i2c devices should be ok to connect straight to FPGA pins.
Join together all SDA, all SCL, put two hardware 2k pullup resistors, and connect this to FPGA.
Don't forget to set unique i2c address for each device.
Don't make huge i2c track loops and don't trace near pulsing coils.

 

[mrflibble]

I don't know why they chose it for this particular case, but in general another reason can be multi-speed. Suppose you don't want to have to deal with supporting all the different i2c speeds and switching between them, then you can use a relatively simple i2c core and simply instantiate it twice. One with parameters for the fast i2c device, and one for the slow i2c device. I've done exactly this in the past because lazy^H^H^H^Hpragmatic.