Multiple Feedback Filter Not Working as Expected

[crutschow]

Post your .asc file of the simulation and I'll take a look at it.

 

[tomk]

Sorry if I was misleading. That was not my intention. I didn't realize that I had stated, either directly or through implication, that the DC component of the input signal is irrelevant. The schematic I posted in post #10 is from my LTSpice simulation, and the source there is 2.5Vdc plus 1Vac @ 25KHz. I didn't including a slowly varying DC, since I was using the sim to investigate the attenuation at 25KHz.

Thank you for offering to take a look at my simulation. I've posted the .asc file, the .lib file for the OPA2743, and a second .asc file that uses generic opamps. I don't see much (or any) difference in the results of the two .asc files.

Again, sorry if I was misleading and thank you for all your help.

 

[LvW]

I didn't including a slowly varying DC, since I was using the sim to investigate the attenuation at 25KHz.

Can you specify "how slowly" the dc component is varying? Does it exhibit a certain frequency? Or does it vary randomly?
Another question: Are you required to use single supply for the opamps?

 

[tomk]

I'd like to preserve info in the input signal from DC to roughly 100Hz, although the upper bound isn't critical. I know that once we start talking about 100Hz it's not really fair to keep calling it the DC component of the signal, but it's still pretty slow relative to the 25KHz that I'm trying to filter out.

The circuit that I've got now is already on a pcb, so I'm stuck with a single supply. For future designs I could use a dual supply, but if possible I'd prefer to stick with a single supply to keep the power supply requirements as simple as possible.

 

[FvM]

The diagram in your post post#10 shows an ac input only.

It clearly shows the DC offset - if you're familiar with LTSpice source syntax.

After clarifying about the DC bias point, the discussion about "filter not working as expected" (insufficient 25 kHzattenuation) is back to the initial points, as e.g. mentioned in my post #7.

Besides cross talk and supply rejection, it would be reasonable to pay attention to Vref bypassing. If your real cicruit is different from the simulation circuit, e.g. how Vref is actually generated, you should post it too.

Single supply circuits are generally problematic for high dynamic or high gain analog signal processing, or at least need to be well considered.

You have been previously asking if your design is a correct way to implement a fourth order filter. Except for the suggested changes to the RC values to achieve an optimal Butterworth filter characteristic, it surely is. This means, the problem isn't caused by the principle design but non-ideal factors that can't be seen from the schematic.

 

[crutschow]

For the AC simulation I got a -6dB frequency of about 615Hz for at the output of the second filter (-3dB point for each filter). The rolloff at the second filter is ≈ -80dB/decade or ≈- 24dB/octave as would be expected for two 2-pole filters in series. It has a -113dB attenuation at 25kHz so a 1V signal at 25KHz would give 2.2µV at the output, which should be in the noise.

Measuring the AC output using the transient analysis I got a value of 4µV pp or 1.4µV RMS, also as expected.

Looking at the op amp characteristics, the graph of channel separation versus frequency shows a value of about -113db at 25kHz, comparable to the output of the filter, so that should be OK.

If you have poor attenuation through the second state on the actual circuit then I suspect crosstalk due to the layout. Is the input signal and the output of the first stage well separated from the summing junction of the second stage? The summing junction of the second stage is very sensitive.

What output voltage are you observing?

If you can't change the layout, then you may have to go with a simple RC filter at the output to get the attenuation you need.

 

[tomk]

Wow, thanks for taking such a close look. The summing junction of the second stage is not well separated from the input or output of the first stage. In fact, the summing junction of the first stage is not well separated from the input either. It looks like this is a likely culprit to the problem: less than expected attenuation in the first stage and almost no attenuation in the second.

With a 1V peak to peak signal @ 25KHz on the input, I get about 20mV after the first stage and 15mV after the second. Both filter outputs are larger than expected.

I've got an RC filter on the output now, and it's working fine. This has been a good lesson for next time. Thank you all for the valuable help!

 

[crutschow]

It's always good practice to isolate the summing junction as much as possible from all high level input and output signals. Also keep all connections to the summing junction as short as possible to minimize stray capacitance to that point.

 

[tomk]

Thank you for the advice. We'll be sure to follow it for our next layout. Can you recommend and good books, white papers, etc on practical layout guidelines, so we know what else to avoid?