eeStud
Member level 1

Hi all,
I have some question regarding multi scenario:
i understand why we need different scenarios, but i have problem understanding the results.
suppose i have 3 different scenarios, each scenario has library cells, derate factor etc. and i am running the flow in IC COMPILER for all three of them, what is the result?
i am not getting 3 different designs, so how it manifests that i set 3 scenarios?
thanks, and i hope my question was clear.
I have some question regarding multi scenario:
i understand why we need different scenarios, but i have problem understanding the results.
suppose i have 3 different scenarios, each scenario has library cells, derate factor etc. and i am running the flow in IC COMPILER for all three of them, what is the result?
i am not getting 3 different designs, so how it manifests that i set 3 scenarios?
thanks, and i hope my question was clear.