multi-gigabit serial link (Xilinx RocketIO) signal integrity

[mretour]

Hi all

I want to run a high speed (2.5 - 3.0 Gbit/s) serial link between Xilinx Virtex 2 Pro FPGAs on two different boards. I want to use an impedance controlled connector (Samtec QTH/QSH-DP) between the boards (one board plugs on top of the other).

Does anyone have experience analysing signal integrity issues in scenarios like this? Anyone got a favourite tool to do it with? I looked at HyperLynx but even the latest version (7) does not model the connector properly. Is Mentor ICX any good? How about HSPICE? How do these two compare from a users point of view to HyperLynx?

Thanks in advance...

 

[lucbra]

Re: multi-gigabit serial link (Xilinx RocketIO) signal integ

The best way I saw so far is a real evaluation board with a L/e/c/r/o/y scope attached to it.
I saw results with Xilinx's board and also Lattice, amazing!