kazumi68
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An external interrupt is generated and sent to this MPC107 and an embedded power pc chip is handling the interrupt routine. My question is we are trying to set it up for Level trigger, but it isn't working. It seems that we get the interrupt SW is handling it, but when we clear the interrupt, the interrupt register is active again, when no interrupt was generated. Our single shows that the previous interrupt never cleared quick enough. Is there a delay on once SW clears the register before we accept the next interrupt?
