how to implement this equation y(nT)=1/N[a(nT-(N-1)T)+a(nT-(N-2)T)+...+a(NT)] using moving average filter or moving window integrator?where N=65 samples
This is often implemented using a delay line. the expression also simplifies to a recursive version -- not an IIR filter, just a recursive implementation of a FIR filter.
on each cycle, the difference between the 66th prior input and the incoming input is taken and added to an accumulator. Thus you need a subtraction, a delay line, and an accumulator.
for 1/65, you compute (2**B)/65 as an integer and then find (((2**B)/65) * y)/(2**B). division by a power of two can be implemented as a shift. synthesis tools will do this for you, although signed types convert this to a shift and conditional add. At least for VHDL, I don't know if Verilog also follows C conventions, but I suspect it would.