musclesinwood
Junior Member level 2
Hi
I am designing a 4-bit pipelined ADC. First I did the system modeling and got an SNR of 24 dB. Then I did the transistor level design.
The problem I am having is in the distortion. In my Spectrum I am having distortion terms which I want to reduce. Any suggestions of how can I reduce distortion in the output spectrum of my ADC.
thank you
I am designing a 4-bit pipelined ADC. First I did the system modeling and got an SNR of 24 dB. Then I did the transistor level design.
The problem I am having is in the distortion. In my Spectrum I am having distortion terms which I want to reduce. Any suggestions of how can I reduce distortion in the output spectrum of my ADC.
thank you