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[Moved]: High-speed level shifter or level converting latch or level converting FF

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hsidesign

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Hello, I am looking for high-speed level shifter or level converting latch or level converting flip-flop.
With high-speed operation ~ 3GHz.
Please give me any suggestion.
Thank you and have a nice day.
 

Re: High-speed level shifter or level converting latch or level converting flip-flop

If this is 3GHz continuous / balanced (-ish) switching
then it could be as simple as a blocking cap and a bias
resistor network on the other side. Zero delay and trivial
loss are upsides, the need for some preamble period for
the bias network to stabilize could be an application
issue.

Does it really need anything more elaborate, and if so,
why? Think it through.
 

Re: High-speed level shifter or level converting latch or level converting flip-flop

Thank you you guys.
I am looking for circuit topology which will be implemented in cmos 0.15um process. Let me explain more about input an output signal:
Input swing: 1V from 0~1V full swing (VDD swing)
Output: 1.8V from 0~1.8V full swing (VDDH swing)
Speed 3Ghz clock signal 50% duty.
 

Re: High-speed level shifter or level converting latch or level converting flip-flop

I think if this is truly single ended CMOS, and you can
stand the initial clock cycles to stabilize operation, a
capacitor-blocked linear-feedback inverter (as is used
in many CMOS RF prescalers' front end) is the ticket.
Presuming you have room for an isolated capacitor
of maybe 10X an inverter's Cin, and a few kOhms of
poly resistor.

The DC-coupled approach of a cross-coupled pair
may not run well at such high frequencies but is
worth a look as well.
 
Re: High-speed level shifter or level converting latch or level converting flip-flop

Thank alot dick_freebird,
I hava tried many topologies based on DC coupling but no one could operate at 3GHz at worst corner.
I think you suggestion of using AC coupling is worthy to try. Do you have any good reference about it?
Have a good day.
 

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