MOSFET saturation in cadence

Status
Not open for further replies.
N

ncj

Junior Member level 1
Joined
Sep 18, 2012
Messages
16
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,374
i am a beginner in Cadence and trying to design a 2 stage MOSfet. Is it necessary that all stages should operate in saturation region for amplification..plz help...
 

what do you mean by 2 stage mosfet?
or do you mean a two-stage amplifier...yes all the
transistors need to be operating in saturation for you to achieve high gain..
 
Reactions: ncj

    N

    ncj

    Points: 2
    Helpful Answer Positive Rating
thank you....and i am having difficulty in making them all in saturation....plz help with some solutions...
 

you can try to keep them all in saturation by allotting atleast 100mV overdrive
across each transistor...you should also use good biasing schemes(high swing biasing) to bias
the transistors..
what type of topology is the 2 stage amplifier?
 

No, you can get gain in the linear or transition regions - just not as
much, or as consistent.

A high bandwidth amp may work better with the front end load
mirror not-saturated - bandwidth tends to drop as DC gain goes
up (an artifact primarily of the low current needed to stay in
saturation).

An op amp that depends on the high (ideal) Rout of all the FETs
in few stages, is most likely to disappoint in its AVOL. Simple is
nice, but often depends on perfection too much.
 
yes...dick_freebird is right in saying that gain can be achieved with
transistors in linear or transition region, but it won't be high enough...
and the bandwidth and gain will be a tradeoff...we will have to lose
some of one thing to achieve the other...
 
Reactions: ncj

    N

    ncj

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…