Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Please add a voltage source for gate and sweep the voltage and check the current. Obtain impedance with V/I.
This is DC impedance.
If you want AC impedance, you need to sweep the frequency for every operating point.
I have built a circuit with a small ac signal imposed on the dc bias voltage in the gate of the MOSFET and also a dc bias voltage at the drain. It does give me some result. But when I do the s parameter analysis on that device with same configuration and same bias conditions, the s parameter value does not match with the previous one.
Should it be an issue?
Operating point impedance is not worth much in a switching FET. The
gate impedance gets real "interesting" once the drain begins to slew.
Small signal analysis doesn't tell you much useful there. Even a linear
MOSFET amp is driven more by Cdg than lumped Cgg, without the
drain realistically loaded and free to move you'll get a bogus idea of
what the gate looks like to the driving source.
@dick_freebird I have not fully understood what you have said but if it is a matter to bias the mosfet in saturation region I did that, still there is discrepancy in the results.
@leo_o2 in s parameter analysis you can bias the MOSFET and then run the analysis