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Mosfet drain-source voltage

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Nizar_Ib

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Hi,

I have the circuit below, when I have voltage on gate-source (~4.3V) I get voltage (~2-4V) on V12 (drain source).
why that happened? I don't face this issue on another circuits with same parameters. I have 12 circuits near each other, are totally separated from each other.
in another way of question, in which cases the FET gives me voltage on DS when I have voltage on GS?

Circuit.JPGCircuit.JPG
 

Hi,

Your left side voltage source is called Vgs, but in your circuit it is V_gs + V_shunt.
If it is called gate-source, why isn't it onnected to the source?

I'd rather connect the right side supply across the shunt.

Klaus
 

Hi,

Your left side voltage source is called Vgs, but in your circuit it is V_gs + V_shunt.
If it is called gate-source, why isn't it onnected to the source?

I'd rather connect the right side supply across the shunt.

Klaus

Hi, sorry, here is my original circuit:

Original Circuit.JPG

- - - Updated - - -

Your VS looks like a capacitor or a battery. What is it?

a VS is a power supply which I want to test.
 

a VS is a power supply which I want to test.
Sounds confused. In your simulation schematic, "V12" is a drawing item without circuit functionality. If you want to simulate a power supply, you'll place an actual voltage source.

What does it mean "I get voltage (~2-4V) on V12"? How do you measure it? Are you talking about simulation or a real circuit?
 

Sounds confused. In your simulation schematic, "V12" is a drawing item without circuit functionality. If you want to simulate a power supply, you'll place an actual voltage source.

What does it mean "I get voltage (~2-4V) on V12"? How do you measure it? Are you talking about simulation or a real circuit?

I'm talking about a real circuit.
when I have voltage on Vgs I get voltage where you see V12, I measure it by DMM.
 

in which cases the FET gives me voltage on DS when I have voltage on GS?
Most likely explanation: drain-gate shorted, either defective MOSFET or external short.
 

Hi,

Your left side voltage source is called Vgs, but in your circuit it is V_gs + V_shunt.
If it is called gate-source, why isn't it onnected to the source?

Klaus

in my circuit the "Vgs" is a regulator.
where sould I connect the negative side? directly to the source of the FET or to the ground of the circuit?
 

Hi,

See the name: It is called V_GS. Therefore I assume one leg is connected with Gate, the other with Source.
I don't know what the circuit is for and who named it V_GS...therefore it's just an assumption.
****
Btw: A regulator usually needs a feedback path...but I don't see any.

Klaus
 

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