MOSFET current control

mtwieg said:

AFAIK N-channel MOSFETs don't have any advantage over P-channel devices regarding SOA limits, so why do you want to use N-channel?

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cost effective

crutschow said:

An NMOS will not charge the cap to the full 42V unless you have a higher bias voltage for the MOSFET, so a P-MOSFET would be better.

It would be simpler just to select a MOSFET with a sufficient SOA so you wouldn't have to step the current.

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Thanks for the information. I have done my simulation with PMOS circuit and it's worked as per requirement. But i would like to make simulation with NMOS for comparision purpose. I would like to draw some comments on both circuitary. SO I am more intended to work with this.
So if you can modify the circuit, it'd be helpful.

crutschow said:

An NMOS will not charge the cap to the full 42V unless you have a higher bias voltage for the MOSFET, so a P-MOSFET would be better.

It would be simpler just to select a MOSFET with a sufficient SOA so you wouldn't have to step the current.

Click to expand...

In the below image, I would like to make the current profile.
Theoritically I have to add some comparators in the control loop. Threshold for the comparators will be set based on the vds. For the moment, one is free to opt threshold voltage. (later I will modify it for particular vds voltage).

But main issue i don't know how to implement these comparators that will give the expected result.
do you have any idea?

One possibility. Note Cap raised to 150 uF to get more of a step response.



Note I did not care about current rating of diodes, you would select appropriate parts
to implement. And the values of the R's and Cap.

I still think Crutschow's circuit, post #10, better solution. But that has to also account for the
42 ohm R paralleled with output cap to get a better look at sim.

Regfards, Dana.

Hi,

if you really want a simple solution for SOA (long term).
Use an NTC, electrically in parallel to G-S of the MOSFET but thermally coupled to the MOSFET.
You need a raw (rather high) current limit just to make sure the MOSFET does not heat up too fast.
But when the MOSFET heats up, the NTC becomes low ohmic and thus it reduces V_GS..and the current automatically drops to a safe value.

This way it truely limits power dissipation (or better say MOSFET temperature) independent of of D-S voltage.
* high current at low V_DS
* low current at high V_DS
simple, cheap..

Klaus

My inclination would be to use a ATTINY85 to take out MOSFET variation device
to device (in case you are making more than one) in Vgs drive, and actually
measure current in circuit, and using code TO adjust the control loop to minimize
startup current (to a target), eg. worst case current peak. Basically a self tuning design,
the power of micros.


Regards, Dana.

parth22 said:

cost effective

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Are you planning on building many of these for production?
Otherwise the cost difference between an N-MOSFET and a P-MOSFET is not that significant.

And what would be the cost of the added bias voltage that the N-MOSFET requires?