gggould
Member level 3
mos varactor
Hi all,
Today I read a sentence in the IBM design menu. It says for the mos varactor device, when the Vg-d is below -0.5V (eg. vg=0.1V, Vsub=0V, Vd/s=0.7V), the capacitance could become unstable.
That is scary. I have never seen this in other foundry's design menu (tsmc/umc/jazz).
Does anyone know if this acturally applies to the MOS varactor from other foundry too??
Thanks
Hi all,
Today I read a sentence in the IBM design menu. It says for the mos varactor device, when the Vg-d is below -0.5V (eg. vg=0.1V, Vsub=0V, Vd/s=0.7V), the capacitance could become unstable.
That is scary. I have never seen this in other foundry's design menu (tsmc/umc/jazz).
Does anyone know if this acturally applies to the MOS varactor from other foundry too??
Thanks