Aastik
Member level 1
Hi,
Have any of you guys used Modular Design feature of Xilinx FPGAs to manage large FPGA designs? This tool is basically used to reduce PAR time for large FPGA designs. Could anybody please tell me how useful this feature is?
Thanks
Have any of you guys used Modular Design feature of Xilinx FPGAs to manage large FPGA designs? This tool is basically used to reduce PAR time for large FPGA designs. Could anybody please tell me how useful this feature is?
Thanks