In my ModelSim testbench, I'm trying to drive a 16-bit bus with the results of a tcl expression. For example:
force mybus [expr int(10000*sin(4.0))]
ModelSim complains that -7568 is unacceptable. Well yes, "force" expects a format such as -16'd7568 or 1110001001110000. What do I add to my expression to do the necessary format conversion?
So wise answer , and I don't understand it at all, because I know a very small of Tcl (OK! still after years and years!) However, as far as I know, there are many ways for generating a sine wave. Just generate the coefficients with a C program ( for one period of pulse ) and put them all in a file, and the remaining is to write a simple Verilog , VHDL code to read the file, and drive the bus.