ModelSim # ** Error (suppressible): (vish-4008) Object 'A' not found. #

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csarami

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Hi,

As a newbie I am trying to test a very simple verilog as follows:

Code: 
module gates(A,B,C,D,E);


input A,B,C;
output D,E;

assign #5 D = A|| B;
assign #5 E = C || D;

endmodule

I issue the following command:
Code: 
add list A B C D E
force A 0

However, I get the following error message:

Code: 
ModelSim> force A 0
# ** Error (suppressible): (vish-4008) Object 'A' not found.
#

Thank you in advance,
CS
 

You shouldn't use force for this, at all. You need to write a testbench that controls the value of the inputs.
 

I am reading a book and this kind of testing ( on the fly at ModelSim terminal) is mentioned there. Example above is from Page 7 of Digital System Design by Roth, et el. The book is published 2017! The method used above is mentioned through the book. It is using ModelSim.
 


burn the book?
 

Ok, let me explain this to you in detail as the message is not sinking in.

Using a GUI or even a force command does not scale. You cannot do any real simulation/verification using this approach. Instead what you should be doing is learning how to write a testbench, which is a simple verilog module that instantiates your circuit and provides inputs and/or sequence of inputs.

For your circuit, a testbench would look like:
Code: 
module tb();
reg A,B,C,D,E;

gates my_instance(.A(A), .B(B), ...);

initial begin
    A = 0;
end

endmodule
 

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